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riscv_ext_rve_h_fix
Tsukasa OI edited this page Sep 5, 2023
·
3 revisions
- Status: Merged for Binutils 2.42
- Branch:
riscv-ext-rve-h-fix
- Tracking PR: #123 (view Pull Request and Diff)
- Mailing List:
- PATCH v1 (2023-08-08)
According to the ratified privileged specification (version 20211203), it says:
The hypervisor extension depends on an "I" base integer ISA with 32 x registers (RV32I or RV64I), not RV32E, which has only 16 x registers.
Also in the latest draft, it also prohibits RV64E
with the H
extension.
This commit prohibits the combination of E
and H
extensions.