Some GPIO manipulations in matrix.c change to atomic.

[mtei]

Description

Some GPIO manipulations in matrix.c are safer to do atomically, so I changed them that way.

I think this is a solution to #5953 that has less scope of influence than #9575.

EDIT:

• Add ATOMIC_BLOCK_FORCEON macro into quantum/quantum.h
  detail: Some GPIO manipulations in matrix.c change to atomic. #10491 (comment)
• Add a description of ATOMIC_BLOCK_FORCEON to docs/internals_gpio_control.md
• quantum/matrix.c and quantum/split_common/matrix.c use ATOMIC_BLOCK_FORCEON

Types of Changes

• Core
• Bugfix
• New feature
• Enhancement/optimization
• Keyboard (addition or update)
• Keymap/layout/userspace (addition or update)
• Documentation

Issues Fixed or Closed by This PR

Checklist

• My code follows the code style of this project: C, Python
• I have read the PR Checklist document and have made the appropriate changes.
• My change requires a change to the documentation.
• I have updated the documentation accordingly.
• I have read the CONTRIBUTING document.
• I have added tests to cover my changes.
• I have tested the changes and verified that they work and don't break anything (as well as I can manage).

[mtei]

Implemented the macro ATOMIC_BLOCK_FORCEON, which has the same function as ATOMIC_BLOCK(ATOMIC_FORCEON) of avr-gcc, for ChibiOS.

For the time being, the implementation of ATOMIC_BLOCK_FORCEON is in quantum/quantum_atomic_extend.h. Please let me know where it is appropriate to put it.

[tzarc]

Been testing it a few days on the Djinn, haven't seen any issues with daily use.

[mtei]

I added the ATOMIC_BLOCK_FORCEON macro to quantum/quantum.h that can be used as follows.

void some_function() {
     // some process
     ATOMIC_BLOCK_FORCEON {
        // Atomic Processing
     }
     // some process
}

Example:

void setPinOutput_writeLow_non_atomic(pin_t pin) {
    setPinOutput(pin);
    writePinLow(pin);
}

void setPinOutput_writeLow(pin_t pin) {
    ATOMIC_BLOCK_FORCEON {
        setPinOutput(pin);
        writePinLow(pin);
    }
}

AVR result (helix/rev2/sc) (click)

Disassembly of section .text.setPinOutput_writeLow_non_atomic:

00000000 <setPinOutput_writeLow_non_atomic>:
   0:	e8 2f       	mov	r30, r24
   2:	e2 95       	swap	r30
   4:	ef 70       	andi	r30, 0x0F	; 15
   6:	f0 e0       	ldi	r31, 0x00	; 0
   8:	31 a1       	ldd	r19, Z+33	; 0x21
   a:	28 2f       	mov	r18, r24
   c:	2f 70       	andi	r18, 0x0F	; 15
   e:	81 e0       	ldi	r24, 0x01	; 1
  10:	90 e0       	ldi	r25, 0x00	; 0
  12:	00 c0       	rjmp	.+0      	; 0x14 <setPinOutput_writeLow_non_atomic+0x14>
			12: R_AVR_13_PCREL	.text.setPinOutput_writeLow_non_atomic+0x16
  14:	88 0f       	add	r24, r24
  16:	2a 95       	dec	r18
  18:	02 f4       	brpl	.+0      	; 0x1a <setPinOutput_writeLow_non_atomic+0x1a>
			18: R_AVR_7_PCREL	.text.setPinOutput_writeLow_non_atomic+0x14
  1a:	38 2b       	or	r19, r24
  1c:	31 a3       	std	Z+33, r19	; 0x21
  1e:	92 a1       	ldd	r25, Z+34	; 0x22
  20:	80 95       	com	r24
  22:	89 23       	and	r24, r25
  24:	82 a3       	std	Z+34, r24	; 0x22
  26:	08 95       	ret

Disassembly of section .text.setPinOutput_writeLow:

00000000 <setPinOutput_writeLow>:
   0:	f8 94       	cli	 		;  /** interrupt disable **/
   2:	e8 2f       	mov	r30, r24	;  /** Same code as above **/
   4:	e2 95       	swap	r30
   6:	ef 70       	andi	r30, 0x0F	; 15
   8:	f0 e0       	ldi	r31, 0x00	; 0
   a:	31 a1       	ldd	r19, Z+33	; 0x21
   c:	28 2f       	mov	r18, r24
   e:	2f 70       	andi	r18, 0x0F	; 15
  10:	81 e0       	ldi	r24, 0x01	; 1
  12:	90 e0       	ldi	r25, 0x00	; 0
  14:	00 c0       	rjmp	.+0      	; 0x16 <setPinOutput_writeLow+0x16>
			14: R_AVR_13_PCREL	.text.setPinOutput_writeLow+0x18
  16:	88 0f       	add	r24, r24
  18:	2a 95       	dec	r18
  1a:	02 f4       	brpl	.+0      	; 0x1c <setPinOutput_writeLow+0x1c>
			1a: R_AVR_7_PCREL	.text.setPinOutput_writeLow+0x16
  1c:	38 2b       	or	r19, r24
  1e:	31 a3       	std	Z+33, r19	; 0x21
  20:	92 a1       	ldd	r25, Z+34	; 0x22
  22:	80 95       	com	r24
  24:	89 23       	and	r24, r25
  26:	82 a3       	std	Z+34, r24	; 0x22
  28:	78 94       	sei	 		;  /** interrupt enable **/
  2a:	08 95       	ret

ARM result (plank/rev6) (click)

00000000 <setPinOutput_writeLow_non_atomic>:
   0:	b538      	push	{r3, r4, r5, lr}
   2:	2201      	movs	r2, #1
   4:	f020 050f 	bic.w	r5, r0, #15
   8:	f000 000f 	and.w	r0, r0, #15
   c:	fa02 f400 	lsl.w	r4, r2, r0
  10:	4621      	mov	r1, r4
  12:	4628      	mov	r0, r5
  14:	b2a4      	uxth	r4, r4
  16:	f7ff fffe 	bl	0 <_pal_lld_setgroupmode>
			16: R_ARM_THM_CALL	_pal_lld_setgroupmode
  1a:	836c      	strh	r4, [r5, #26]
  1c:	bd38      	pop	{r3, r4, r5, pc}

Disassembly of section .text.setPinOutput_writeLow:

00000000 <setPinOutput_writeLow>:
   0:	b538      	push	{r3, r4, r5, lr}
   2:	2320      	movs	r3, #32
   4:	f383 8811 	msr	BASEPRI, r3	;  /** interrupt disable **/
   8:	2201      	movs	r2, #1		;  /** Same code as above **/
   a:	f020 050f 	bic.w	r5, r0, #15
   e:	f000 000f 	and.w	r0, r0, #15
  12:	fa02 f400 	lsl.w	r4, r2, r0
  16:	4621      	mov	r1, r4
  18:	4628      	mov	r0, r5
  1a:	b2a4      	uxth	r4, r4
  1c:	f7ff fffe 	bl	0 <_pal_lld_setgroupmode>
			1c: R_ARM_THM_CALL	_pal_lld_setgroupmode
  20:	836c      	strh	r4, [r5, #26]
  22:	2300      	movs	r3, #0
  24:	f383 8811 	msr	BASEPRI, r3	;  /** interrupt enable **/
  28:	bd38      	pop	{r3, r4, r5, pc}

(see https://github.com/mtei/qmk_firmware/blob/matrix_c_atomic/docs/internals_gpio_control.md#atomic-operation)