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Implement Hardware Idle support and use it configurably for the Softswitch barrier #297
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… discriminate between when we are supposed to support hardware idle, and when we are not.
… the Mothership know. The Mothership will use global backend 'start' and 'go' methods instead.
…e at deploy time. It causes a Mothership to call backend's loadAll method.
…I/Orchestrator into FEATURE-0242-HardwareIdle
…TSII/Orchestrator into FEATURE-0242-HardwareIdle-Mothership
…ing into a GCC bug where weak symbols are not replaced by strong.
…I/Orchestrator into FEATURE-0242-HardwareIdle
….com/POETSII/Orchestrator into FEATURE-0242-HardwareIdle-Mothership
…ship Mothership-facing changes to support hardware idle.
…ship' into BUGFIX-0285-HardwareIdleBarrier
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Dec 6, 2021
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**NOT TO BE REVIEWED UNTIL:**
Fix availability and naming of properties and state structs for devices #276 is merged.A related examples PR has been created.This PR:
OnHardwareIdle
handler. resolves Softswitch: Implement Hardware Idle #242:tinselIdle()
.ThreadContext
structures for all threads on used cores rather than just used threads.tinselIdle()
instead oftinselWaitUntil(TINSEL_CAN_RECV)
in the control loop if the device type has a Hardware Idle handler.tinselIdle()
if it hosts no devices.A more verbose summary:
This PR implements Hardware Idle support in the Orchestrator and Softswitch. Some fairly significant changes to deployment logic have been required in order to support this feature and tweaks to tinsel have been required.
In summary, Hardware Idle requires all threads in the system, whether they have been started or not, to be sat at a call to
tinselIdle()
for the hardware synchronisation point to be. This is at odds with the existing paradigm in the Orchestrator where binaries are only built and loaded onto used cores and only used threads are started.To address this, we now build a common dummy binary that facilitates Hardware Idle and define a default behaviour for unused threads. The Mothership now deploys the "dummy" binaries to all cores before deploying application-specific binaries to used cores. Changes were also made to Tinsel to enable a common binary to be loaded onto all cores without starting them.
Additionally, the start-up barrier was still found to be a problem for some application types despite the fixes in #248. To address this, we make use of the Hardware Idle feature as an (optional) way to implement barrier release. This behaviour is configurable prior to compilation with two new Composer commands:
compose /hwbarrier = *
enables the Hardware Idle barrier. This is now the default behaviour.compoae /swbarrier = *
disabled the Hardware Idle barrier and falls back to existing behaviour.As an extra bonus, this PR also implements support for
doSend
in the Send Handler and fixes #309. This PR also emits the "global" RTS flags and indices (intoMessageFormats.h
) as required by #308.Testing:
The basic behaviour of Hardware Idle has been tested with a new Hardware Idle simple test (included in POETSII/Orchestrator_examples#15).
The modified barrier release has been extensively tested with the GALS Arithmetic application (pending commit to the Examples repository) at various sizes between 25 and 250,000 devices deployed with the spread algorithm. There were zero instances of an application failing to be released from the barrier.
The basic behaviour of doSend has been tested with a new doSend simple test (included in POETSII/Orchestrator_examples#15).
The functionality of the global RTS variables has been checked with
clock_tree_broad_s2.v4.xml
from the 2019 benchmarksConflicts:
This changeset potentially makes #262 easier as we can discriminate between the barrier releasing naturally or being broken by an inbound packet. Care is required.
This changeset makes multi-application runs significantly harder.
This changeset makes implementing support for multiple supervisors more involved and will likely require changes to Tinsel.