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drivers: i3c: add controller handoff #78361

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@XenuIsWatching XenuIsWatching commented Sep 12, 2024 •
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This implements Controller Handoff according to Section 5.1.7.1 of I3C v1.1.1 Specification

@XenuIsWatching XenuIsWatching force-pushed the i3c-controller-handoff branch 9 times, most recently from bb95267 to af9bb94 Compare September 14, 2024 06:18
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XenuIsWatching commented Sep 14, 2024 •
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rebasing on top of #78376

@XenuIsWatching XenuIsWatching force-pushed the i3c-controller-handoff branch 2 times, most recently from 890454f to bcc5b45 Compare September 14, 2024 16:49
@XenuIsWatching XenuIsWatching force-pushed the i3c-controller-handoff branch 7 times, most recently from 0668c5c to f92cd11 Compare September 17, 2024 06:34
@XenuIsWatching XenuIsWatching force-pushed the i3c-controller-handoff branch 5 times, most recently from a6e0ae3 to 90f0a75 Compare September 26, 2024 00:16
@XenuIsWatching XenuIsWatching force-pushed the i3c-controller-handoff branch 5 times, most recently from 7a87db2 to 7aed0a1 Compare October 7, 2024 18:55
@XenuIsWatching XenuIsWatching force-pushed the i3c-controller-handoff branch 3 times, most recently from 883bbb6 to 8610127 Compare October 18, 2024 23:37
@XenuIsWatching XenuIsWatching force-pushed the i3c-controller-handoff branch 2 times, most recently from 775f61b to 1ea9029 Compare October 26, 2024 18:01
@XenuIsWatching XenuIsWatching force-pushed the i3c-controller-handoff branch 2 times, most recently from 4242591 to ce6c660 Compare November 2, 2024 07:13
@XenuIsWatching
drivers: i3c: add ccc getacccr
0c4f4e6 
Add a ccc helper for getacccr

Signed-off-by: Ryan McClelland <[email protected]>
@XenuIsWatching XenuIsWatching marked this pull request as ready for review November 2, 2024 07:38
@XenuIsWatching XenuIsWatching force-pushed the i3c-controller-handoff branch 2 times, most recently from 931a9cf to 43319bc Compare November 2, 2024 07:49
@XenuIsWatching
drivers: i3c: shell: add ccc getacccr command
814ba22 
Add the CCC GETACCCR command to the i3c shell.

Signed-off-by: Ryan McClelland <[email protected]>
@XenuIsWatching
drivers: i3c: add controller handoff parameters in to i3c desc
5c5394b 
Add the parameters crcaps and crhdly1 in to the i3c device descriptor.
Also, retrieve the values if they are available.

Signed-off-by: Ryan McClelland <[email protected]>
@XenuIsWatching
drivers: i3c: add controller handoff helper
00997b0 
This adds controller handoff according to section 5.1.7.1 of the
I3C specification.

Signed-off-by: Ryan McClelland <[email protected]>
@XenuIsWatching
drivers: i3c: shell: add crhdly1 and crcaps to info
fa1d8fd 
Add crhdly1 and crcaps to the info shell command.

Signed-off-by: Ryan McClelland <[email protected]>
@XenuIsWatching
drivers: i3c: shell: record crcaps and crhdly1 in to desc from shell
42772de 
Record the crcaps and crhdly1 in to the i3c descriptor when calling from
the shell.

Signed-off-by: Ryan McClelland <[email protected]>
@XenuIsWatching
drivers: i3c: shell: run clang-format
35bdbb3 
Run clang-format on i3c_shell.c.

Signed-off-by: Ryan McClelland <[email protected]>
@XenuIsWatching XenuIsWatching force-pushed the i3c-controller-handoff branch 2 times, most recently from 83182da to 7aa5ad3 Compare November 2, 2024 17:53
@XenuIsWatching XenuIsWatching added this to the v4.1.0 milestone Nov 7, 2024
@XenuIsWatching XenuIsWatching force-pushed the i3c-controller-handoff branch 2 times, most recently from a6798e6 to 84ec905 Compare November 30, 2024 18:20
@XenuIsWatching
drivers: i3c: add controller handoff support
8f3bdd3 
Add controller handoff

Signed-off-by: Ryan McClelland <[email protected]>
Chenhongren added a commit to Chenhongren/zephyr that referenced this pull request Dec 2, 2024
@Chenhongren
WIP: driver: i3c: add it51xxx i3cm driver
257859f 
**DO NOT FORGET TO RUN CLANG-FORMAT**

Build:
west build -p always -b it513xx_evb samples/hello_world/ \
-DCONFIG_I3C=y -DCONFIG_I3C_SHELL=y -DCONFIG_I3C_USE_IBI=y -DCONFIG_LOG=y

Test plan:
- i3c shell
- controller role
  - ccc command
    [Pass] (B)RSTDAA: $i3c ccc rstdaa i3c@f03c00
    [Pass] (B)ENTDAA: $i3c ccc entdaa i3c@f03c00
    [Pass] (D)GETPID: $i3c ccc getpid i3c@f03c00 i3c_dummy@2f000005fa00010002
    [Pass] (D)GETBCR: $i3c ccc getbcr i3c@f03c00 i3c_dummy@2f000005fa00010002
    [Pass] (D)GETDCR: $i3c ccc getdcr i3c@f03c00 i3c_dummy@2f000005fa00010002
    [Pass] (D)SETMWL:
                 $i3c ccc setmwl i3c@f03c00 i3c_dummy@2f000005fa00010002 BB
                 $devmem 0xf03d6a 8
                 $devmem 0xf03d6b 8
    [Pass] (D)GETMWL: $i3c ccc getmwl i3c@f03c00 i3c_dummy@2f000005fa00010002
    [Pass] direct read ccc with repeated start flag
    [Pass] direct write ccc with repeated start flag
  - (dynamic address) ENTDAA/SETAASA/SETDASA
    [Pass] ENTDAA(1-I3CM to 1-I3CS / 1-I3CM to 2-I3CS)
           $i3c ccc entdaa i3c@f03c00
           // check i3cs0 dynamic address
           $devmem 0xf03d64 8
           // check i3cs1 dynamic address
           $devmem 0xf03de4 8
    [Pass] SETDASA
           $i3c ccc rstdaa i3c@f03c00
           $i3c ccc setdasa i3c@f03c00 i3c_dummy@18000005fa00010001 0x18
           $i3c ccc setdasa i3c@f03c00 i3c_dummy@19000005fa00010002 0x19
           $i3c ccc getpid i3c@f03c00 i3c_dummy@18000005fa00010001
           $i3c ccc getpid i3c@f03c00 i3c_dummy@19000005fa00010002
    [Pass] SETAASA(note: need to enable the "supports-setaasa" property)
           $i3c ccc rstdaa i3c@f03c00
           $i3c ccc setaasa i3c@f03c00
           $i3c info i3c@f03c00
           $i3c ccc getpid i3c@f03c00 i3c_dummy@18000005fa00010001
           $i3c ccc getpid i3c@f03c00 i3c_dummy@19000005fa00010002
  - [Pass] (ibi) hot-join
    $i3c ccc rstdaa i3c@f03c00
    // generate i3cs0 hj event
    $devmem 0xf03d0c 8 0x03
    $i3c ccc getpid i3c@f03c00 i3c_dummy@18000005fa00010001
    $i3c ccc getpid i3c@f03c00 i3c_dummy@19000005fa00010002
  - [GG] (ibi) target interrupt
  - [Unsupported??](ibi) secondary controller request
    Check the PR: zephyrproject-rtos#78361
  - private transfer(with/without 7Eh address)
    [pending] (with 7Eh, start flag)
    [pending] (with 7Eh, repeated start flag)
    [pending] (without 7Eh, start flag)
    [pending] (without 7Eh, repeated start flag)
  - legacy i2c private transfer

Question:
- exit hdr pattern is sent if no target responses 7Eh address
- how to ack dynamic address assignment(I3CM15'b[1])
- what is i3cm ccc with defining byte(I3CM15'b[0] and I3CM16)
- timing control
- secondary controller, IBI controller request are supported??

Note:
- MIPI I3C v1.0 not support direct ccc with data byte(defining byte), therefore,
  > RSTACT(9Ah): unsupported
  > GETCAPS(95h), GETSTATUS(90h): only support format 1
  > GETMXDS(94h): only support format 1 and 2

Change-Id: I7cb70eccf17faf4360d70ba5833bd31a00b5343e
Signed-off-by: Ren Chen <[email protected]>
Chenhongren added a commit to Chenhongren/zephyr that referenced this pull request Dec 2, 2024
@Chenhongren
WIP: driver: i3c: add it51xxx i3cm driver
0518c55 
**DO NOT FORGET TO RUN CLANG-FORMAT**

Build:
west build -p always -b it513xx_evb samples/hello_world/ \
-DCONFIG_I3C=y -DCONFIG_I3C_SHELL=y -DCONFIG_I3C_USE_IBI=y -DCONFIG_LOG=y

Test plan:
- i3c shell
- controller role
  - ccc command
    [Pass] (B)RSTDAA: $i3c ccc rstdaa i3c@f03c00
    [Pass] (B)ENTDAA: $i3c ccc entdaa i3c@f03c00
    [Pass] (D)GETPID: $i3c ccc getpid i3c@f03c00 i3c_dummy@2f000005fa00010002
    [Pass] (D)GETBCR: $i3c ccc getbcr i3c@f03c00 i3c_dummy@2f000005fa00010002
    [Pass] (D)GETDCR: $i3c ccc getdcr i3c@f03c00 i3c_dummy@2f000005fa00010002
    [Pass] (D)SETMWL:
                 $i3c ccc setmwl i3c@f03c00 i3c_dummy@2f000005fa00010002 BB
                 $devmem 0xf03d6a 8
                 $devmem 0xf03d6b 8
    [Pass] (D)GETMWL: $i3c ccc getmwl i3c@f03c00 i3c_dummy@2f000005fa00010002
    [Pass] direct read ccc with repeated start flag
    [Pass] direct write ccc with repeated start flag
  - (dynamic address) ENTDAA/SETAASA/SETDASA
    [Pass] ENTDAA(1-I3CM to 1-I3CS / 1-I3CM to 2-I3CS)
           $i3c ccc entdaa i3c@f03c00
           // check i3cs0 dynamic address
           $devmem 0xf03d64 8
           // check i3cs1 dynamic address
           $devmem 0xf03de4 8
    [Pass] SETDASA
           $i3c ccc rstdaa i3c@f03c00
           $i3c ccc setdasa i3c@f03c00 i3c_dummy@18000005fa00010001 0x18
           $i3c ccc setdasa i3c@f03c00 i3c_dummy@19000005fa00010002 0x19
           $i3c ccc getpid i3c@f03c00 i3c_dummy@18000005fa00010001
           $i3c ccc getpid i3c@f03c00 i3c_dummy@19000005fa00010002
    [Pass] SETAASA(note: need to enable the "supports-setaasa" property)
           $i3c ccc rstdaa i3c@f03c00
           $i3c ccc setaasa i3c@f03c00
           $i3c info i3c@f03c00
           $i3c ccc getpid i3c@f03c00 i3c_dummy@18000005fa00010001
           $i3c ccc getpid i3c@f03c00 i3c_dummy@19000005fa00010002
  - [Pass] (ibi) hot-join
    $i3c ccc rstdaa i3c@f03c00
    // generate i3cs0 hj event
    $devmem 0xf03d0c 8 0x03
    $i3c ccc getpid i3c@f03c00 i3c_dummy@18000005fa00010001
    $i3c ccc getpid i3c@f03c00 i3c_dummy@19000005fa00010002
  - [GG] (ibi) target interrupt
  - [Unsupported??](ibi) secondary controller request
    Check the PR: zephyrproject-rtos#78361
  - private transfer(with/without 7Eh address)
    [pending] (with 7Eh, start flag)
    [pending] (with 7Eh, repeated start flag)
    [pending] (without 7Eh, start flag)
    [pending] (without 7Eh, repeated start flag)
  - legacy i2c private transfer

Question:
- exit hdr pattern is sent if no target responses 7Eh address
- how to ack dynamic address assignment(I3CM15'b[1])
- what is i3cm ccc with defining byte(I3CM15'b[0] and I3CM16)
- timing control
- secondary controller, IBI controller request are supported??

Note:
- MIPI I3C v1.0 not support direct ccc with data byte(defining byte), therefore,
  > RSTACT(9Ah): unsupported
  > GETCAPS(95h), GETSTATUS(90h): only support format 1
  > GETMXDS(94h): only support format 1 and 2

Change-Id: I7cb70eccf17faf4360d70ba5833bd31a00b5343e
Signed-off-by: Ren Chen <[email protected]>
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@gmarull gmarull Awaiting requested review from gmarull

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