Commit
This commit does not belong to any branch on this repository, and may belong to a fork outside of the repository.
WIP: driver: i3c: add it51xxx i3cm driver
**DO NOT FORGET TO RUN CLANG-FORMAT** Build: west build -p always -b it513xx_evb samples/hello_world/ \ -DCONFIG_I3C=y -DCONFIG_I3C_SHELL=y -DCONFIG_I3C_USE_IBI=y -DCONFIG_LOG=y Test plan: - i3c shell - controller role - ccc command [Pass] (B)RSTDAA: $i3c ccc rstdaa i3c@f03c00 [Pass] (B)ENTDAA: $i3c ccc entdaa i3c@f03c00 [Pass] (D)GETPID: $i3c ccc getpid i3c@f03c00 i3c_dummy@2f000005fa00010002 [Pass] (D)GETBCR: $i3c ccc getbcr i3c@f03c00 i3c_dummy@2f000005fa00010002 [Pass] (D)GETDCR: $i3c ccc getdcr i3c@f03c00 i3c_dummy@2f000005fa00010002 [Pass] (D)SETMWL: $i3c ccc setmwl i3c@f03c00 i3c_dummy@2f000005fa00010002 BB $devmem 0xf03d6a 8 $devmem 0xf03d6b 8 [Pass] (D)GETMWL: $i3c ccc getmwl i3c@f03c00 i3c_dummy@2f000005fa00010002 [Pass] direct read ccc with repeated start flag [Pass] direct write ccc with repeated start flag - (dynamic address) ENTDAA/SETAASA/SETDASA [Pass] ENTDAA(1-I3CM to 1-I3CS / 1-I3CM to 2-I3CS) $i3c ccc entdaa i3c@f03c00 // check i3cs0 dynamic address $devmem 0xf03d64 8 // check i3cs1 dynamic address $devmem 0xf03de4 8 [Pass] SETDASA $i3c ccc rstdaa i3c@f03c00 $i3c ccc setdasa i3c@f03c00 i3c_dummy@18000005fa00010001 0x18 $i3c ccc setdasa i3c@f03c00 i3c_dummy@19000005fa00010002 0x19 $i3c ccc getpid i3c@f03c00 i3c_dummy@18000005fa00010001 $i3c ccc getpid i3c@f03c00 i3c_dummy@19000005fa00010002 [Pass] SETAASA(note: need to enable the "supports-setaasa" property) $i3c ccc rstdaa i3c@f03c00 $i3c ccc setaasa i3c@f03c00 $i3c info i3c@f03c00 $i3c ccc getpid i3c@f03c00 i3c_dummy@18000005fa00010001 $i3c ccc getpid i3c@f03c00 i3c_dummy@19000005fa00010002 - [Pass] (ibi) hot-join $i3c ccc rstdaa i3c@f03c00 // generate i3cs0 hj event $devmem 0xf03d0c 8 0x03 $i3c ccc getpid i3c@f03c00 i3c_dummy@18000005fa00010001 $i3c ccc getpid i3c@f03c00 i3c_dummy@19000005fa00010002 - [GG] (ibi) target interrupt - [Unsupported??](ibi) secondary controller request Check the PR: zephyrproject-rtos#78361 - private transfer(with/without 7Eh address) [pending] (with 7Eh, start flag) [pending] (with 7Eh, repeated start flag) [pending] (without 7Eh, start flag) [pending] (without 7Eh, repeated start flag) - legacy i2c private transfer Question: - exit hdr pattern is sent if no target responses 7Eh address - how to ack dynamic address assignment(I3CM15'b[1]) - what is i3cm ccc with defining byte(I3CM15'b[0] and I3CM16) - timing control - secondary controller, IBI controller request are supported?? Note: - MIPI I3C v1.0 not support direct ccc with data byte(defining byte), therefore, > RSTACT(9Ah): unsupported > GETCAPS(95h), GETSTATUS(90h): only support format 1 > GETMXDS(94h): only support format 1 and 2 Change-Id: I7cb70eccf17faf4360d70ba5833bd31a00b5343e Signed-off-by: Ren Chen <[email protected]>
- Loading branch information