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[chip] Convert Edge-triggered status interrupt to Level #15378
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i think if there aren't any identified issues, it's okay to not change. |
i split the uart one to a separate issue since uart has already passed D3... |
Changing this to backlog as we decided not to change if the current interrupts work. |
Triaged for |
Triaged for |
Triaged for |
Triaged for |
Thanks @ballifatih. @cindychip: WDYT for |
Carried over from #12989:
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@msfschaffner , I am trying to assess whether we should make changes for KMAC as well and if yes for which KMAC interrupts:
Independently, I am now factoring the DD/DV work KMAC out into a seperate issue (#21049). |
I actually don't understand why UART's Careful order of operations can make the former imply the latter, but personally, I'm not a fan of potential race conditions at interfaces. ;) That said, it probably doesn't make much difference. The status-type watermark interrupt is better for notifying about available space for sending more data. tx_empty is probably only useful as a fence, if you want to know that a particular discrete message finished sending, for timing purposes or otherwise. |
I thought the preference stated by others in previous comments might be relevant for UART only due to the much slower timing. But who knows. Thanks for sharing your opinion, I think we are both on the same page. :-) |
For HMAC, I concur with @vogelpi's suggestion for KMAC:
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@msfschaffner |
@vogelpi / @andreaskurth that sounds good for HMAC / KMAC. I have split out the HMAC one as well here #21206. |
@jesultra was there a specific reason to keep the |
I have split the tasks out into individual issues that are associated with the individual blocks. CC @johngt |
I have another interrupt that I think should be status instead of event: intr_state on the System Reset Controller. This should be a status based on the state of the combo_intr_status and key_intr_status registers (which should remain event-based though). Otherwise there are race conditions trying to read/clear those three registers correctly. Thoughts? |
Thanks for this suggestion; reopening for @msfschaffner to assess. |
I think that makes sense. There is a similar one in opentitan/hw/ip/adc_ctrl/data/adc_ctrl.hjson Lines 353 to 371 in 7e196e6
I will convert these when I open up |
fifo_empty
interrupt from event to status type #21049CC: @weicaiyang @a-will
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