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Add cocotb tests for AXI peripherals #1616

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This PR extends #1613 by adding Verilog simulation and tests for MemReader, AxiWriter and MemWriter procs. The simulation and testing is carried out with cocotb framework and Icarus Verilog simulator. The PR also includes utilities for driving and monitoring DSLX channels by the cocotb framework.

Cocotb and the provided utilities are Python packages and don't require any special rules in the workspace. The utilities we created are generic, and although they were placed in the xls/modules/zstd/cocotb directory, they can be moved to another location if this is more desired.

Please note that this code is based on top of #1613 so the diff also contains all the changes from that PR. The IR generation for the MemWriter proc is also blocked by #1615.

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CC @proppy - please take a look at this PR

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proppy commented Sep 24, 2024

Does this replace #1057?

@proppy proppy mentioned this pull request Sep 24, 2024
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Regarding the content, this PR uses the ideas from #1057 but provides more helpers for writing the simulations.
The previous PR was adding cocotb to a different directory, for use in other places in the workspace. Here we provide the scripts directly in the modules/zstd directory. We can discard the previous PR, if you think that it is easier to merge the cocotb support with the AXI tests, or we can move the created libraries to #1057 and merge them separately.

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proppy commented Oct 1, 2024

We can discard the previous PR, if you think that it is easier to merge the cocotb support with the AXI tests

I think it'll be easier to maintain it along side the zstd modules for now, and we can generalize it to the wider xls project as it matures.

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lpawelcz commented Oct 4, 2024

@proppy we rebased the PR onto current state of the #1613 and updated cocotb testbenches to take into account the changes made to MemReader and MemWriter

@lpawelcz lpawelcz force-pushed the axi-cocotb branch 2 times, most recently from 19bc572 to 9e77432 Compare October 9, 2024 14:32
@lpawelcz lpawelcz mentioned this pull request Oct 9, 2024
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proppy commented Oct 23, 2024

rebase?

@lpawelcz lpawelcz force-pushed the axi-cocotb branch 2 times, most recently from 462a6c6 to a0caa6d Compare October 24, 2024 06:48
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Rebased onto newest main

CC @proppy

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CC @proppy

The last CI failure was caused by benchmark_main segmentation fault in DecoderMux proc IR benchmark.
This is an unrelated issue as we also experienced the same failure on current main. It appears that this particular IR benchmark started failing randomly.
We are investigating the root cause of the problem. We noticed that the failure happens when the Block IR is evaluated with JIT. The evaluation is carried out with a random set of inputs which explains the unpredictable nature of the failures.
The problem might be caused by the usage of assert!() inside the proc but for now we were unable to prepare a minimal example for that.

koblonczek and others added 7 commits November 22, 2024 11:06
- XLSStruct for easier handling and serializing/deserializing XLS structs
- XLSChannel that serves as a dummy receiving channel
- XLSMonitor that monitors transactions on an XLS channel
- XLSDriver that can send data on an XLS channel
- LatencyScoreboard that can measure latency between corresponding transactions on input and output buses
- File-backed AXI memory python model

Internal-tag: [#64075]
Signed-off-by: Krzysztof Obłonczek <[email protected]>
Co-authred-by: Pawel Czarnecki <[email protected]>
Co-authred-by: Robert Winkler <[email protected]>
Signed-off-by: Michal Czyz <[email protected]>
Signed-off-by: Pawel Czarnecki <[email protected]>
Signed-off-by: Robert Winkler <[email protected]>
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5 participants