[AArch64] Query and JSON export Hypervisor Configuration Register

* `HCR_EL2` succesfully accessed in `EL1` with RK3588 (A55 + A76) * Experimental mode required
cyring · Nov 18, 2024 · ed5feaa · ed5feaa
1 parent 09a1d36
commit ed5feaa
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diff --git a/aarch64/corefreq-api.h b/aarch64/corefreq-api.h
@@ -200,6 +200,7 @@ typedef struct
 
 	struct {
 		Bit64			FLAGS	__attribute__ ((aligned (8)));
+		Bit64			HCR	__attribute__ ((aligned (8)));
 		Bit64			SCTLR	__attribute__ ((aligned (8)));
 		Bit64			SCTLR2	__attribute__ ((aligned (8)));
 		Bit64			EL	__attribute__ ((aligned (8)));

diff --git a/aarch64/corefreq-cli-json.c b/aarch64/corefreq-cli-json.c
@@ -1391,6 +1391,10 @@ void JsonSysInfo(RO(SHM_STRUCT) *RO(Shm))
 			json_key(&s, "FLAGS");
 			json_string(&s, hexStr);
 
+			snprintf(hexStr, 32, "0x%llx", RO(Shm)->Cpu[cpu].SystemRegister.HCR);
+			json_key(&s, "HCR");
+			json_string(&s, hexStr);
+
 			snprintf(hexStr, 32, "0x%llx", RO(Shm)->Cpu[cpu].SystemRegister.SCTLR);
 			json_key(&s, "SCTLR");
 			json_string(&s, hexStr);

diff --git a/aarch64/corefreq.h b/aarch64/corefreq.h
@@ -187,6 +187,7 @@ typedef struct
 
 	struct {
 		Bit64			FLAGS	__attribute__ ((aligned (8)));
+		Bit64			HCR	__attribute__ ((aligned (8)));
 		Bit64			SCTLR	__attribute__ ((aligned (8)));
 		Bit64			SCTLR2	__attribute__ ((aligned (8)));
 		Bit64			EL	__attribute__ ((aligned (8)));

diff --git a/aarch64/corefreqd.c b/aarch64/corefreqd.c
@@ -860,6 +860,9 @@ void SystemRegisters(	RO(SHM_STRUCT) *RO(Shm), RO(CORE) **RO(Core),
 	RO(Shm)->Cpu[cpu].SystemRegister.FLAGS = \
 				RO(Core, AT(cpu))->SystemRegister.FLAGS;
 
+	RO(Shm)->Cpu[cpu].SystemRegister.HCR = \
+				RO(Core, AT(cpu))->SystemRegister.HCR;
+
 	RO(Shm)->Cpu[cpu].SystemRegister.SCTLR = \
 				RO(Core, AT(cpu))->SystemRegister.SCTLR;
 

diff --git a/aarch64/corefreqk.c b/aarch64/corefreqk.c
@@ -2449,6 +2449,14 @@ static void SystemRegisters(CORE_RO *Core)
 
 	isar2.value = SysRegRead(ID_AA64ISAR2_EL1);
 
+    if (Experimental) {
+	__asm__ __volatile__(
+		"mrs	%[hcr]	,	hcr_el2"
+		: [hcr] 	"=r" (Core->SystemRegister.HCR)
+		:
+		: "cc", "memory"
+	);
+    }
 	__asm__ __volatile__(
 		"mrs	%[sctlr],	sctlr_el1"	"\n\t"
 		"mrs	%[mmfr1],	id_aa64mmfr1_el1""\n\t"