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[AArch64] Adding other features from ID_AA64ISAR2_EL1
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@cyring
cyring committed Feb 25, 2024
1 parent 7a7f684 commit 96b112b
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Showing 8 changed files with 236 additions and 18 deletions.
16 changes: 16 additions & 0 deletions aarch64/corefreq-cli-json.c
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Original file line number Diff line number Diff line change
Expand Up @@ -545,6 +545,22 @@ void JsonSysInfo(RO(SHM_STRUCT) *RO(Shm))
json_literal(&s, "%u", (unsigned) RO(Shm)->Proc.Features.PAuth_LR);
json_key(&s, "WFxT");
json_literal(&s, "%u", (unsigned) RO(Shm)->Proc.Features.WFxT);
json_key(&s, "RPRES");
json_literal(&s, "%u", (unsigned) RO(Shm)->Proc.Features.RPRES);
json_key(&s, "MOPS");
json_literal(&s, "%u", (unsigned) RO(Shm)->Proc.Features.MOPS);
json_key(&s, "HBC");
json_literal(&s, "%u", (unsigned) RO(Shm)->Proc.Features.HBC);
json_key(&s, "SYSREG128");
json_literal(&s, "%u", (unsigned) RO(Shm)->Proc.Features.SYSREG128);
json_key(&s, "SYSINSTR128");
json_literal(&s, "%u", (unsigned) RO(Shm)->Proc.Features.SYSINSTR128);
json_key(&s, "PRFMSLC");
json_literal(&s, "%u", (unsigned) RO(Shm)->Proc.Features.PRFMSLC);
json_key(&s, "RPRFM");
json_literal(&s, "%u", (unsigned) RO(Shm)->Proc.Features.RPRFM);
json_key(&s, "CSSC");
json_literal(&s, "%u", (unsigned) RO(Shm)->Proc.Features.CSSC);
json_end_object(&s);
}
json_key(&s, "MMFR0");
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24 changes: 24 additions & 0 deletions aarch64/corefreq-cli-rsc-en.h
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Original file line number Diff line number Diff line change
Expand Up @@ -793,6 +793,9 @@

#define RSC_ISA_JSCVT_COMM_CODE_EN " JavaScript Conversion "
#define RSC_ISA_LRCPC_COMM_CODE_EN " Load-Acquire RCpc instructions "
#define RSC_ISA_MOPS_COMM_CODE_EN \
" Memory Copy and Memory Set instructions "

#define RSC_ISA_PACIMP_COMM_CODE_EN \
" Pointer Authentication Code, using Generic key "

Expand All @@ -805,19 +808,32 @@
#define RSC_ISA_PAUTH_COMM_CODE_EN " Pointer Authentication "
#define RSC_ISA_PAUTH2_COMM_CODE_EN " Enhanced Pointer Authentication "
#define RSC_ISA_PAUTH_LR_COMM_CODE_EN " Pointer Authentication Link Register "
#define RSC_ISA_PRFMSLC_COMM_CODE_EN " PRFM instructions support SLC target "
#define RSC_ISA_FRINTTS_COMM_CODE_EN " Floating-point to Integer "
#define RSC_ISA_SPECRES_COMM_CODE_EN " Prediction Invalidation "
#define RSC_ISA_BF16_COMM_CODE_EN " BFloat16 instructions "
#define RSC_ISA_EBF16_COMM_CODE_EN " Extended BFloat16 "
#define RSC_ISA_CSSC_COMM_CODE_EN " Common Short Sequence Compression "
#define RSC_ISA_HBC_COMM_CODE_EN " Hinted Conditional Branch "
#define RSC_ISA_I8MM_COMM_CODE_EN " Int8 Matrix Multiplication "
#define RSC_ISA_RPRES_COMM_CODE_EN \
" Reciprocal Estimate & Reciprocal Square Root Estimate "

#define RSC_ISA_SB_COMM_CODE_EN " Speculation Barrier "
#define RSC_ISA_SYSREG128_COMM_CODE_EN \
" Instructions to access 128-bit System Registers "

#define RSC_ISA_SYSINSTR128_COMM_CODE_EN \
" System instructions that can take 128-bit inputs "

#define RSC_ISA_WFxT_COMM_CODE_EN " WFE & WFI instructions with timeout "
#define RSC_ISA_XS_COMM_CODE_EN " XS attribute for memory "
#define RSC_ISA_LS64_COMM_CODE_EN " Atomic 64-byte loads and stores "
#define RSC_ISA_DGH_COMM_CODE_EN " Data Gathering Hint "
#define RSC_ISA_DPB_COMM_CODE_EN " Data Persistence writeback "
#define RSC_ISA_RAND_COMM_CODE_EN " Read Random Number "
#define RSC_ISA_RDMA_COMM_CODE_EN " Rounding Double Multiply Accumulate "
#define RSC_ISA_RPRFM_COMM_CODE_EN " RPRFM hint instruction "
#define RSC_ISA_SHA_COMM_CODE_EN " Secure Hash Algorithms extensions "
#define RSC_ISA_SM_COMM_CODE_EN " Chinese cryptography algorithm "
#define RSC_ISA_SIMD_COMM_CODE_EN " Advanced SIMD Extensions "
Expand Down Expand Up @@ -1978,19 +1994,26 @@
#define RSC_ISA_LRCPC_CODE " LRCPC [%c]"
#define RSC_ISA_LRCPC2_CODE " LRCPC2 [%c]"
#define RSC_ISA_LRCPC3_CODE " LRCPC3 [%c]"
#define RSC_ISA_MOPS_CODE " MOPS [%c]"
#define RSC_ISA_PACGA_CODE " PACGA [%c]"
#define RSC_ISA_PACQARMA3_CODE " PACQARMA3 [%c]"
#define RSC_ISA_PACQARMA5_CODE " PACQARMA5 [%c]"
#define RSC_ISA_PAUTH_CODE " PAuth [%c]"
#define RSC_ISA_PAUTH2_CODE " PAuth2 [%c]"
#define RSC_ISA_PAUTH_LR_CODE " PAuth_LR [%c]"
#define RSC_ISA_PRFMSLC_CODE " PRFMSLC [%c]"
#define RSC_ISA_FRINTTS_CODE " FRINTTS [%c]"
#define RSC_ISA_SPECRES_CODE " SPECRES [%c]"
#define RSC_ISA_SPECRES2_CODE " SPECRES2 [%c]"
#define RSC_ISA_BF16_CODE " BF16 [%c]"
#define RSC_ISA_EBF16_CODE " EBF16 [%c]"
#define RSC_ISA_CSSC_CODE " CSSC [%c]"
#define RSC_ISA_HBC_CODE " HBC [%c]"
#define RSC_ISA_I8MM_CODE " I8MM [%c]"
#define RSC_ISA_RPRES_CODE " RPRES [%c]"
#define RSC_ISA_SB_CODE " SB [%c]"
#define RSC_ISA_SYSREG128_CODE " SYSREG128 [%c]"
#define RSC_ISA_SYSINSTR128_CODE " SYSINSTR128 [%c]"
#define RSC_ISA_WFxT_CODE " WFxT [%c]"
#define RSC_ISA_XS_CODE " XS [%c]"
#define RSC_ISA_LS64_CODE " LS64 [%c]"
Expand All @@ -2001,6 +2024,7 @@
#define RSC_ISA_DPB2_CODE " DPB2 [%c]"
#define RSC_ISA_RAND_CODE " RAND [%c]"
#define RSC_ISA_RDMA_CODE " RDMA [%c]"
#define RSC_ISA_RPRFM_CODE " RPRFM [%c]"
#define RSC_ISA_SHA1_CODE " SHA1 [%c]"
#define RSC_ISA_SHA256_CODE " SHA256 [%c]"
#define RSC_ISA_SHA512_CODE " SHA512 [%c]"
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8 changes: 8 additions & 0 deletions aarch64/corefreq-cli-rsc-fr.h
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Original file line number Diff line number Diff line change
Expand Up @@ -479,25 +479,33 @@ do echo -en "$h$l\t""\xc3""\x$h$l""\t"; done; done;echo
#define RSC_ISA_FPACCOMBINE_COMM_CODE_FR RSC_ISA_FPACCOMBINE_COMM_CODE_EN
#define RSC_ISA_JSCVT_COMM_CODE_FR RSC_ISA_JSCVT_COMM_CODE_EN
#define RSC_ISA_LRCPC_COMM_CODE_FR RSC_ISA_LRCPC_COMM_CODE_EN
#define RSC_ISA_MOPS_COMM_CODE_FR RSC_ISA_MOPS_COMM_CODE_EN
#define RSC_ISA_PACIMP_COMM_CODE_FR RSC_ISA_PACIMP_COMM_CODE_EN
#define RSC_ISA_PACQARMA3_COMM_CODE_FR RSC_ISA_PACQARMA3_COMM_CODE_EN
#define RSC_ISA_PACQARMA5_COMM_CODE_FR RSC_ISA_PACQARMA5_COMM_CODE_EN
#define RSC_ISA_PAUTH_COMM_CODE_FR RSC_ISA_PAUTH_COMM_CODE_EN
#define RSC_ISA_PAUTH2_COMM_CODE_FR RSC_ISA_PAUTH2_COMM_CODE_EN
#define RSC_ISA_PAUTH_LR_COMM_CODE_FR RSC_ISA_PAUTH_LR_COMM_CODE_EN
#define RSC_ISA_PRFMSLC_COMM_CODE_FR RSC_ISA_PRFMSLC_COMM_CODE_EN
#define RSC_ISA_FRINTTS_COMM_CODE_FR RSC_ISA_FRINTTS_COMM_CODE_EN
#define RSC_ISA_SPECRES_COMM_CODE_FR RSC_ISA_SPECRES_COMM_CODE_EN
#define RSC_ISA_BF16_COMM_CODE_FR RSC_ISA_BF16_COMM_CODE_EN
#define RSC_ISA_EBF16_COMM_CODE_FR RSC_ISA_EBF16_COMM_CODE_EN
#define RSC_ISA_CSSC_COMM_CODE_FR RSC_ISA_CSSC_COMM_CODE_EN
#define RSC_ISA_HBC_COMM_CODE_FR RSC_ISA_HBC_COMM_CODE_EN
#define RSC_ISA_I8MM_COMM_CODE_FR RSC_ISA_I8MM_COMM_CODE_EN
#define RSC_ISA_RPRES_COMM_CODE_FR RSC_ISA_RPRES_COMM_CODE_EN
#define RSC_ISA_SB_COMM_CODE_FR RSC_ISA_SB_COMM_CODE_EN
#define RSC_ISA_SYSREG128_COMM_CODE_FR RSC_ISA_SYSREG128_COMM_CODE_EN
#define RSC_ISA_SYSINSTR128_COMM_CODE_FR RSC_ISA_SYSINSTR128_COMM_CODE_EN
#define RSC_ISA_WFxT_COMM_CODE_FR RSC_ISA_WFxT_COMM_CODE_EN
#define RSC_ISA_XS_COMM_CODE_FR RSC_ISA_XS_COMM_CODE_EN
#define RSC_ISA_LS64_COMM_CODE_FR RSC_ISA_LS64_COMM_CODE_EN
#define RSC_ISA_DGH_COMM_CODE_FR RSC_ISA_DGH_COMM_CODE_EN
#define RSC_ISA_DPB_COMM_CODE_FR RSC_ISA_DPB_COMM_CODE_EN
#define RSC_ISA_RAND_COMM_CODE_FR RSC_ISA_RAND_COMM_CODE_EN
#define RSC_ISA_RDMA_COMM_CODE_FR RSC_ISA_RDMA_COMM_CODE_EN
#define RSC_ISA_RPRFM_COMM_CODE_FR RSC_ISA_RPRFM_COMM_CODE_EN
#define RSC_ISA_SHA_COMM_CODE_FR RSC_ISA_SHA_COMM_CODE_EN
#define RSC_ISA_SM_COMM_CODE_FR RSC_ISA_SM_COMM_CODE_EN
#define RSC_ISA_SIMD_COMM_CODE_FR RSC_ISA_SIMD_COMM_CODE_EN
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16 changes: 16 additions & 0 deletions aarch64/corefreq-cli-rsc.c
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Original file line number Diff line number Diff line change
Expand Up @@ -699,6 +699,8 @@ RESOURCE_ST Resource[] = {
LDQ(RSC_ISA_LRCPC2),
LDQ(RSC_ISA_LRCPC3),
LDT(RSC_ISA_LRCPC_COMM),
LDQ(RSC_ISA_MOPS),
LDT(RSC_ISA_MOPS_COMM),
LDQ(RSC_ISA_PACGA),
LDT(RSC_ISA_PACIMP_COMM),
LDQ(RSC_ISA_PACQARMA3),
Expand All @@ -711,6 +713,8 @@ RESOURCE_ST Resource[] = {
LDT(RSC_ISA_PAUTH2_COMM),
LDQ(RSC_ISA_PAUTH_LR),
LDT(RSC_ISA_PAUTH_LR_COMM),
LDQ(RSC_ISA_PRFMSLC),
LDT(RSC_ISA_PRFMSLC_COMM),
LDQ(RSC_ISA_FRINTTS),
LDT(RSC_ISA_FRINTTS_COMM),
LDQ(RSC_ISA_SPECRES),
Expand All @@ -720,10 +724,20 @@ RESOURCE_ST Resource[] = {
LDT(RSC_ISA_BF16_COMM),
LDQ(RSC_ISA_EBF16),
LDT(RSC_ISA_EBF16_COMM),
LDQ(RSC_ISA_CSSC),
LDT(RSC_ISA_CSSC_COMM),
LDQ(RSC_ISA_HBC),
LDT(RSC_ISA_HBC_COMM),
LDQ(RSC_ISA_I8MM),
LDT(RSC_ISA_I8MM_COMM),
LDQ(RSC_ISA_RPRES),
LDT(RSC_ISA_RPRES_COMM),
LDQ(RSC_ISA_SB),
LDT(RSC_ISA_SB_COMM),
LDQ(RSC_ISA_SYSREG128),
LDT(RSC_ISA_SYSREG128_COMM),
LDQ(RSC_ISA_SYSINSTR128),
LDT(RSC_ISA_SYSINSTR128_COMM),
LDQ(RSC_ISA_WFxT),
LDT(RSC_ISA_WFxT_COMM),
LDQ(RSC_ISA_XS),
Expand All @@ -741,6 +755,8 @@ RESOURCE_ST Resource[] = {
LDT(RSC_ISA_RAND_COMM),
LDQ(RSC_ISA_RDMA),
LDT(RSC_ISA_RDMA_COMM),
LDQ(RSC_ISA_RPRFM),
LDT(RSC_ISA_RPRFM_COMM),
LDQ(RSC_ISA_SHA1),
LDQ(RSC_ISA_SHA256),
LDQ(RSC_ISA_SHA512),
Expand Down
16 changes: 16 additions & 0 deletions aarch64/corefreq-cli-rsc.h
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Original file line number Diff line number Diff line change
Expand Up @@ -522,6 +522,8 @@ enum {
RSC_ISA_LRCPC2,
RSC_ISA_LRCPC3,
RSC_ISA_LRCPC_COMM,
RSC_ISA_MOPS,
RSC_ISA_MOPS_COMM,
RSC_ISA_PACGA,
RSC_ISA_PACIMP_COMM,
RSC_ISA_PACQARMA3,
Expand All @@ -534,6 +536,8 @@ enum {
RSC_ISA_PAUTH2_COMM,
RSC_ISA_PAUTH_LR,
RSC_ISA_PAUTH_LR_COMM,
RSC_ISA_PRFMSLC,
RSC_ISA_PRFMSLC_COMM,
RSC_ISA_FRINTTS,
RSC_ISA_FRINTTS_COMM,
RSC_ISA_SPECRES,
Expand All @@ -543,10 +547,20 @@ enum {
RSC_ISA_BF16_COMM,
RSC_ISA_EBF16,
RSC_ISA_EBF16_COMM,
RSC_ISA_CSSC,
RSC_ISA_CSSC_COMM,
RSC_ISA_HBC,
RSC_ISA_HBC_COMM,
RSC_ISA_I8MM,
RSC_ISA_I8MM_COMM,
RSC_ISA_RPRES,
RSC_ISA_RPRES_COMM,
RSC_ISA_SB,
RSC_ISA_SB_COMM,
RSC_ISA_SYSREG128,
RSC_ISA_SYSREG128_COMM,
RSC_ISA_SYSINSTR128,
RSC_ISA_SYSINSTR128_COMM,
RSC_ISA_WFxT,
RSC_ISA_WFxT_COMM,
RSC_ISA_XS,
Expand All @@ -564,6 +578,8 @@ enum {
RSC_ISA_RAND_COMM,
RSC_ISA_RDMA,
RSC_ISA_RDMA_COMM,
RSC_ISA_RPRFM,
RSC_ISA_RPRFM_COMM,
RSC_ISA_SHA1,
RSC_ISA_SHA256,
RSC_ISA_SHA512,
Expand Down
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