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[AArch64] Pointer Authentication (PA*) and WFxT features
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@cyring
cyring committed Feb 25, 2024
1 parent 5e5baab commit 7a7f684
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Showing 8 changed files with 204 additions and 16 deletions.
21 changes: 21 additions & 0 deletions aarch64/corefreq-cli-json.c
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Original file line number Diff line number Diff line change
Expand Up @@ -526,6 +526,27 @@ void JsonSysInfo(RO(SHM_STRUCT) *RO(Shm))
json_literal(&s, "%u", (unsigned) RO(Shm)->Proc.Features.DPB2);
json_end_object(&s);
}
json_key(&s, "ISAR2");
{
json_start_object(&s);
json_key(&s, "PACQARMA3");
json_literal(&s, "%u", (unsigned) RO(Shm)->Proc.Features.PACQARMA3);
json_key(&s, "PAuth");
json_literal(&s, "%u", (unsigned) RO(Shm)->Proc.Features.PAuth);
json_key(&s, "EPAC");
json_literal(&s, "%u", (unsigned) RO(Shm)->Proc.Features.EPAC);
json_key(&s, "PAuth2");
json_literal(&s, "%u", (unsigned) RO(Shm)->Proc.Features.PAuth2);
json_key(&s, "FPAC");
json_literal(&s, "%u", (unsigned) RO(Shm)->Proc.Features.FPAC);
json_key(&s, "FPACCOMBINE");
json_literal(&s, "%u", (unsigned) RO(Shm)->Proc.Features.FPACCOMBINE);
json_key(&s, "PAuth_LR");
json_literal(&s, "%u", (unsigned) RO(Shm)->Proc.Features.PAuth_LR);
json_key(&s, "WFxT");
json_literal(&s, "%u", (unsigned) RO(Shm)->Proc.Features.WFxT);
json_end_object(&s);
}
json_key(&s, "MMFR0");
{
json_start_object(&s);
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20 changes: 20 additions & 0 deletions aarch64/corefreq-cli-rsc-en.h
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Original file line number Diff line number Diff line change
Expand Up @@ -779,27 +779,39 @@
#define RSC_ISA_LSE_COMM_CODE_EN " Atomic instructions "
#define RSC_ISA_CRC32_COMM_CODE_EN " Cyclic Redundancy Check "
#define RSC_ISA_DP_COMM_CODE_EN " Dot Product instructions "
#define RSC_ISA_EPAC_COMM_CODE_EN " Enhanced Pointer Authentication "
#define RSC_ISA_FCMA_COMM_CODE_EN \
" Floating-point Complex Multiplication & Addition "

#define RSC_ISA_FHM_COMM_CODE_EN \
" Floating-point Half-precision Multiplication "

#define RSC_ISA_FP_COMM_CODE_EN " Floating Point "
#define RSC_ISA_FPAC_COMM_CODE_EN " Faulting Pointer Authentication Code "
#define RSC_ISA_FPACCOMBINE_COMM_CODE_EN \
" Faulting on Combined Pointer Authentication "

#define RSC_ISA_JSCVT_COMM_CODE_EN " JavaScript Conversion "
#define RSC_ISA_LRCPC_COMM_CODE_EN " Load-Acquire RCpc instructions "
#define RSC_ISA_PACIMP_COMM_CODE_EN \
" Pointer Authentication Code, using Generic key "

#define RSC_ISA_PACQARMA3_COMM_CODE_EN \
" Pointer Authentication Code, using the QARMA3 algorithm "

#define RSC_ISA_PACQARMA5_COMM_CODE_EN \
" Pointer Authentication Code, using the QARMA5 algorithm "

#define RSC_ISA_PAUTH_COMM_CODE_EN " Pointer Authentication "
#define RSC_ISA_PAUTH2_COMM_CODE_EN " Enhanced Pointer Authentication "
#define RSC_ISA_PAUTH_LR_COMM_CODE_EN " Pointer Authentication Link Register "
#define RSC_ISA_FRINTTS_COMM_CODE_EN " Floating-point to Integer "
#define RSC_ISA_SPECRES_COMM_CODE_EN " Prediction Invalidation "
#define RSC_ISA_BF16_COMM_CODE_EN " BFloat16 instructions "
#define RSC_ISA_EBF16_COMM_CODE_EN " Extended BFloat16 "
#define RSC_ISA_I8MM_COMM_CODE_EN " Int8 Matrix Multiplication "
#define RSC_ISA_SB_COMM_CODE_EN " Speculation Barrier "
#define RSC_ISA_WFxT_COMM_CODE_EN " WFE & WFI instructions with timeout "
#define RSC_ISA_XS_COMM_CODE_EN " XS attribute for memory "
#define RSC_ISA_LS64_COMM_CODE_EN " Atomic 64-byte loads and stores "
#define RSC_ISA_DGH_COMM_CODE_EN " Data Gathering Hint "
Expand Down Expand Up @@ -1956,22 +1968,30 @@
#define RSC_ISA_LSE128_CODE " LSE128 [%c]"
#define RSC_ISA_CRC32_CODE " CRC32 [%c]"
#define RSC_ISA_DP_CODE " DP [%c]"
#define RSC_ISA_EPAC_CODE " EPAC [%c]"
#define RSC_ISA_FCMA_CODE " FCMA [%c]"
#define RSC_ISA_FHM_CODE " FHM [%c]"
#define RSC_ISA_FP_CODE " FP [%c]"
#define RSC_ISA_FPAC_CODE " FPAC [%c]"
#define RSC_ISA_FPACCOMBINE_CODE " FPACCOMBINE [%c]"
#define RSC_ISA_JSCVT_CODE " JSCVT [%c]"
#define RSC_ISA_LRCPC_CODE " LRCPC [%c]"
#define RSC_ISA_LRCPC2_CODE " LRCPC2 [%c]"
#define RSC_ISA_LRCPC3_CODE " LRCPC3 [%c]"
#define RSC_ISA_PACGA_CODE " PACGA [%c]"
#define RSC_ISA_PACQARMA3_CODE " PACQARMA3 [%c]"
#define RSC_ISA_PACQARMA5_CODE " PACQARMA5 [%c]"
#define RSC_ISA_PAUTH_CODE " PAuth [%c]"
#define RSC_ISA_PAUTH2_CODE " PAuth2 [%c]"
#define RSC_ISA_PAUTH_LR_CODE " PAuth_LR [%c]"
#define RSC_ISA_FRINTTS_CODE " FRINTTS [%c]"
#define RSC_ISA_SPECRES_CODE " SPECRES [%c]"
#define RSC_ISA_SPECRES2_CODE " SPECRES2 [%c]"
#define RSC_ISA_BF16_CODE " BF16 [%c]"
#define RSC_ISA_EBF16_CODE " EBF16 [%c]"
#define RSC_ISA_I8MM_CODE " I8MM [%c]"
#define RSC_ISA_SB_CODE " SB [%c]"
#define RSC_ISA_WFxT_CODE " WFxT [%c]"
#define RSC_ISA_XS_CODE " XS [%c]"
#define RSC_ISA_LS64_CODE " LS64 [%c]"
#define RSC_ISA_LS64_V_CODE " LS64_V [%c]"
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8 changes: 8 additions & 0 deletions aarch64/corefreq-cli-rsc-fr.h
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Original file line number Diff line number Diff line change
Expand Up @@ -471,19 +471,27 @@ do echo -en "$h$l\t""\xc3""\x$h$l""\t"; done; done;echo
#define RSC_ISA_LSE_COMM_CODE_FR RSC_ISA_LSE_COMM_CODE_EN
#define RSC_ISA_CRC32_COMM_CODE_FR RSC_ISA_CRC32_COMM_CODE_EN
#define RSC_ISA_DP_COMM_CODE_FR RSC_ISA_DP_COMM_CODE_EN
#define RSC_ISA_EPAC_COMM_CODE_FR RSC_ISA_EPAC_COMM_CODE_EN
#define RSC_ISA_FCMA_COMM_CODE_FR RSC_ISA_FCMA_COMM_CODE_EN
#define RSC_ISA_FHM_COMM_CODE_FR RSC_ISA_FHM_COMM_CODE_EN
#define RSC_ISA_FP_COMM_CODE_FR RSC_ISA_FP_COMM_CODE_EN
#define RSC_ISA_FPAC_COMM_CODE_FR RSC_ISA_FPAC_COMM_CODE_EN
#define RSC_ISA_FPACCOMBINE_COMM_CODE_FR RSC_ISA_FPACCOMBINE_COMM_CODE_EN
#define RSC_ISA_JSCVT_COMM_CODE_FR RSC_ISA_JSCVT_COMM_CODE_EN
#define RSC_ISA_LRCPC_COMM_CODE_FR RSC_ISA_LRCPC_COMM_CODE_EN
#define RSC_ISA_PACIMP_COMM_CODE_FR RSC_ISA_PACIMP_COMM_CODE_EN
#define RSC_ISA_PACQARMA3_COMM_CODE_FR RSC_ISA_PACQARMA3_COMM_CODE_EN
#define RSC_ISA_PACQARMA5_COMM_CODE_FR RSC_ISA_PACQARMA5_COMM_CODE_EN
#define RSC_ISA_PAUTH_COMM_CODE_FR RSC_ISA_PAUTH_COMM_CODE_EN
#define RSC_ISA_PAUTH2_COMM_CODE_FR RSC_ISA_PAUTH2_COMM_CODE_EN
#define RSC_ISA_PAUTH_LR_COMM_CODE_FR RSC_ISA_PAUTH_LR_COMM_CODE_EN
#define RSC_ISA_FRINTTS_COMM_CODE_FR RSC_ISA_FRINTTS_COMM_CODE_EN
#define RSC_ISA_SPECRES_COMM_CODE_FR RSC_ISA_SPECRES_COMM_CODE_EN
#define RSC_ISA_BF16_COMM_CODE_FR RSC_ISA_BF16_COMM_CODE_EN
#define RSC_ISA_EBF16_COMM_CODE_FR RSC_ISA_EBF16_COMM_CODE_EN
#define RSC_ISA_I8MM_COMM_CODE_FR RSC_ISA_I8MM_COMM_CODE_EN
#define RSC_ISA_SB_COMM_CODE_FR RSC_ISA_SB_COMM_CODE_EN
#define RSC_ISA_WFxT_COMM_CODE_FR RSC_ISA_WFxT_COMM_CODE_EN
#define RSC_ISA_XS_COMM_CODE_FR RSC_ISA_XS_COMM_CODE_EN
#define RSC_ISA_LS64_COMM_CODE_FR RSC_ISA_LS64_COMM_CODE_EN
#define RSC_ISA_DGH_COMM_CODE_FR RSC_ISA_DGH_COMM_CODE_EN
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16 changes: 16 additions & 0 deletions aarch64/corefreq-cli-rsc.c
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Original file line number Diff line number Diff line change
Expand Up @@ -681,12 +681,18 @@ RESOURCE_ST Resource[] = {
LDT(RSC_ISA_CRC32_COMM),
LDQ(RSC_ISA_DP),
LDT(RSC_ISA_DP_COMM),
LDQ(RSC_ISA_EPAC),
LDT(RSC_ISA_EPAC_COMM),
LDQ(RSC_ISA_FCMA),
LDT(RSC_ISA_FCMA_COMM),
LDQ(RSC_ISA_FHM),
LDT(RSC_ISA_FHM_COMM),
LDQ(RSC_ISA_FP),
LDT(RSC_ISA_FP_COMM),
LDQ(RSC_ISA_FPAC),
LDT(RSC_ISA_FPAC_COMM),
LDQ(RSC_ISA_FPACCOMBINE),
LDT(RSC_ISA_FPACCOMBINE_COMM),
LDQ(RSC_ISA_JSCVT),
LDT(RSC_ISA_JSCVT_COMM),
LDQ(RSC_ISA_LRCPC),
Expand All @@ -695,8 +701,16 @@ RESOURCE_ST Resource[] = {
LDT(RSC_ISA_LRCPC_COMM),
LDQ(RSC_ISA_PACGA),
LDT(RSC_ISA_PACIMP_COMM),
LDQ(RSC_ISA_PACQARMA3),
LDT(RSC_ISA_PACQARMA3_COMM),
LDQ(RSC_ISA_PACQARMA5),
LDT(RSC_ISA_PACQARMA5_COMM),
LDQ(RSC_ISA_PAUTH),
LDT(RSC_ISA_PAUTH_COMM),
LDQ(RSC_ISA_PAUTH2),
LDT(RSC_ISA_PAUTH2_COMM),
LDQ(RSC_ISA_PAUTH_LR),
LDT(RSC_ISA_PAUTH_LR_COMM),
LDQ(RSC_ISA_FRINTTS),
LDT(RSC_ISA_FRINTTS_COMM),
LDQ(RSC_ISA_SPECRES),
Expand All @@ -710,6 +724,8 @@ RESOURCE_ST Resource[] = {
LDT(RSC_ISA_I8MM_COMM),
LDQ(RSC_ISA_SB),
LDT(RSC_ISA_SB_COMM),
LDQ(RSC_ISA_WFxT),
LDT(RSC_ISA_WFxT_COMM),
LDQ(RSC_ISA_XS),
LDT(RSC_ISA_XS_COMM),
LDQ(RSC_ISA_LS64),
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16 changes: 16 additions & 0 deletions aarch64/corefreq-cli-rsc.h
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Original file line number Diff line number Diff line change
Expand Up @@ -504,12 +504,18 @@ enum {
RSC_ISA_CRC32_COMM,
RSC_ISA_DP,
RSC_ISA_DP_COMM,
RSC_ISA_EPAC,
RSC_ISA_EPAC_COMM,
RSC_ISA_FCMA,
RSC_ISA_FCMA_COMM,
RSC_ISA_FHM,
RSC_ISA_FHM_COMM,
RSC_ISA_FP,
RSC_ISA_FP_COMM,
RSC_ISA_FPAC,
RSC_ISA_FPAC_COMM,
RSC_ISA_FPACCOMBINE,
RSC_ISA_FPACCOMBINE_COMM,
RSC_ISA_JSCVT,
RSC_ISA_JSCVT_COMM,
RSC_ISA_LRCPC,
Expand All @@ -518,8 +524,16 @@ enum {
RSC_ISA_LRCPC_COMM,
RSC_ISA_PACGA,
RSC_ISA_PACIMP_COMM,
RSC_ISA_PACQARMA3,
RSC_ISA_PACQARMA3_COMM,
RSC_ISA_PACQARMA5,
RSC_ISA_PACQARMA5_COMM,
RSC_ISA_PAUTH,
RSC_ISA_PAUTH_COMM,
RSC_ISA_PAUTH2,
RSC_ISA_PAUTH2_COMM,
RSC_ISA_PAUTH_LR,
RSC_ISA_PAUTH_LR_COMM,
RSC_ISA_FRINTTS,
RSC_ISA_FRINTTS_COMM,
RSC_ISA_SPECRES,
Expand All @@ -533,6 +547,8 @@ enum {
RSC_ISA_I8MM_COMM,
RSC_ISA_SB,
RSC_ISA_SB_COMM,
RSC_ISA_WFxT,
RSC_ISA_WFxT_COMM,
RSC_ISA_XS,
RSC_ISA_XS_COMM,
RSC_ISA_LS64,
Expand Down
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