[AArch64] Physical Address range supported

cyring · Feb 21, 2024 · 881c56b · 881c56b
1 parent 8157c0d
commit 881c56b
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Showing 8 changed files with 35 additions and 1 deletion.
diff --git a/aarch64/corefreq-cli-json.c b/aarch64/corefreq-cli-json.c
@@ -529,6 +529,8 @@ void JsonSysInfo(RO(SHM_STRUCT) *RO(Shm))
 					json_literal(&s, "%u", (unsigned) RO(Shm)->Proc.Features.ExS);
 					json_key(&s, "BigEnd_EL0");
 					json_literal(&s, "%u", (unsigned) RO(Shm)->Proc.Features.BigEnd_EL0);
+					json_key(&s, "PARange");
+					json_literal(&s, "%u", (unsigned) RO(Shm)->Proc.Features.PARange);
 					json_end_object(&s);
 				}
 				json_key(&s, "MMFR1");

diff --git a/aarch64/corefreq-cli-rsc-en.h b/aarch64/corefreq-cli-rsc-en.h
@@ -833,6 +833,7 @@
 #define RSC_FEATURES_MPAM_CODE_EN	"Memory Partitioning and Monitoring"
 #define RSC_FEATURES_MTE_CODE_EN	"Memory Tagging Extension"
 #define RSC_FEATURES_NMI_CODE_EN	"Non Maskable Interrupt"
+#define RSC_FEATURES_PA_CODE_EN 	"Physical Address range"
 #define RSC_FEATURES_PAN_CODE_EN	"Privileged Access Never"
 #define RSC_FEATURES_RAS_CODE_EN     "Reliability Availability & Serviceability"
 #define RSC_FEATURES_RME_CODE_EN	"Realm Management Extension"

diff --git a/aarch64/corefreq-cli-rsc-fr.h b/aarch64/corefreq-cli-rsc-fr.h
@@ -536,6 +536,7 @@ do echo -en "$h$l\t""\xc3""\x$h$l""\t"; done; done;echo
 			"Partitionnement et supervision de la m""\xa9""moire"
 
 #define RSC_FEATURES_NMI_CODE_FR	"Interruption non masquable"
+#define RSC_FEATURES_PA_CODE_FR 	"Plage d'Adressage Physique"
 #define RSC_FEATURES_PAN_CODE_FR	"Aucun privil""\xa8""ge d'acc""\xa8""s"
 #define RSC_FEATURES_RAS_CODE_FR	\
 		"Fiabilit""\xa9"" Disponibilit""\xa9"" et Durabilit""\xa9"

diff --git a/aarch64/corefreq-cli-rsc.c b/aarch64/corefreq-cli-rsc.c
@@ -791,6 +791,7 @@ RESOURCE_ST Resource[] = {
 	LDT(RSC_FEATURES_MPAM),
 	LDT(RSC_FEATURES_MTE),
 	LDT(RSC_FEATURES_NMI),
+	LDT(RSC_FEATURES_PA),
 	LDT(RSC_FEATURES_PAN),
 	LDT(RSC_FEATURES_RAS),
 	LDT(RSC_FEATURES_RME),

diff --git a/aarch64/corefreq-cli-rsc.h b/aarch64/corefreq-cli-rsc.h
@@ -614,6 +614,7 @@ enum {
 	RSC_FEATURES_MPAM,
 	RSC_FEATURES_MTE,
 	RSC_FEATURES_NMI,
+	RSC_FEATURES_PA,
 	RSC_FEATURES_PAN,
 	RSC_FEATURES_RAS,
 	RSC_FEATURES_RME,

diff --git a/aarch64/corefreq-cli.c b/aarch64/corefreq-cli.c
@@ -2171,6 +2171,30 @@ REASON_CODE SysInfoFeatures(	Window *win,
 		width - 18 - RSZ(FEATURES_NMI),
 		NULL
 	},
+	{
+		NULL,
+		RO(Shm)->Proc.Features.PARange <= 0b0111,
+		attr_Feat,
+		2, RO(Shm)->Proc.Features.PARange == 0b0000 ?
+			"%s 32 bits, 4GB  %.*sPA   [%7s]"
+		: RO(Shm)->Proc.Features.PARange == 0b0001 ?
+			"%s 36 bits, 64GB %.*sPA   [%7s]"
+		: RO(Shm)->Proc.Features.PARange == 0b0010 ?
+			"%s 40 bits, 1TB  %.*sPA   [%7s]"
+		: RO(Shm)->Proc.Features.PARange == 0b0011 ?
+			"%s 42 bits, 4TB  %.*sPA   [%7s]"
+		: RO(Shm)->Proc.Features.PARange == 0b0100 ?
+			"%s 44 bits, 16TB %.*sPA   [%7s]"
+		: RO(Shm)->Proc.Features.PARange == 0b0101 ?
+			"%s 48 bits, 256TB%.*sPA   [%7s]"
+		: RO(Shm)->Proc.Features.PARange == 0b0110 ?
+			"%s 52 bits, 4PB  %.*sPA   [%7s]"
+		: RO(Shm)->Proc.Features.PARange == 0b0111 ?
+			"%s 56 bits, 64PB %.*sPA   [%7s]"
+		:	"%s               %.*sPA   [%7s]",
+		RSC(FEATURES_PA).CODE(), width - 32 - RSZ(FEATURES_PA),
+		NULL
+	},
 	{
 		NULL,
 		RO(Shm)->Proc.Features.PAN == 1,

diff --git a/aarch64/corefreqk.c b/aarch64/corefreqk.c
@@ -941,6 +941,9 @@ static void Query_Features(void *pArg)
 		iArg->Features->BigEnd_EE = 0;
 		break;
 	}
+
+	iArg->Features->PARange = mmfr0.PARange;
+
 	switch (mmfr1.VH) {
 	case 0b0001:
 		iArg->Features->VHE = 1;

diff --git a/aarch64/coretypes.h b/aarch64/coretypes.h
@@ -834,7 +834,8 @@ typedef struct	/* BSP features.					*/
 			ExS		: 47-46,
 			BigEnd_EL0	: 48-47,
 			BigEnd_EE	: 49-48,
-			_Unused1_	: 64-48;
+			PARange 	: 53-49,
+			_Unused1_	: 64-53;
 
 		Bit64	CSV2		:  4-0,
 			SSBS		:  8-4,