[AArch64] Mixed-Endianness (BigEnd_ELx)

* Fixed condition of GIC strings
cyring · Feb 21, 2024 · 8157c0d · 8157c0d
1 parent 8935a81
commit 8157c0d
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Showing 8 changed files with 44 additions and 1 deletion.
diff --git a/aarch64/corefreq-cli-json.c b/aarch64/corefreq-cli-json.c
@@ -527,6 +527,8 @@ void JsonSysInfo(RO(SHM_STRUCT) *RO(Shm))
 					json_literal(&s, "%u", (unsigned) RO(Shm)->Proc.Features.FGT2);
 					json_key(&s, "ExS");
 					json_literal(&s, "%u", (unsigned) RO(Shm)->Proc.Features.ExS);
+					json_key(&s, "BigEnd_EL0");
+					json_literal(&s, "%u", (unsigned) RO(Shm)->Proc.Features.BigEnd_EL0);
 					json_end_object(&s);
 				}
 				json_key(&s, "MMFR1");

diff --git a/aarch64/corefreq-cli-rsc-en.h b/aarch64/corefreq-cli-rsc-en.h
@@ -821,6 +821,7 @@
 
 #define RSC_FEATURES_ACPI_CODE_EN    "Advanced Configuration & Power Interface"
 #define RSC_FEATURES_AMU_CODE_EN	"Activity Monitor Unit"
+#define RSC_FEATURES_BIG_END_CODE_EN	"Mixed-Endianness"
 #define RSC_FEATURES_BTI_CODE_EN	"Branch Target Identification"
 #define RSC_FEATURES_EBEP_CODE_EN	"Exception-based event profiling"
 #define RSC_FEATURES_ECV_CODE_EN	"Enhanced Counter Virtualization"

diff --git a/aarch64/corefreq-cli-rsc-fr.h b/aarch64/corefreq-cli-rsc-fr.h
@@ -513,6 +513,7 @@ do echo -en "$h$l\t""\xc3""\x$h$l""\t"; done; done;echo
 #define RSC_FEATURES_AMU_CODE_FR	\
 			"Unit""\xa9"" de surveillance de l'activit""\xa9"
 
+#define RSC_FEATURES_BIG_END_CODE_FR	RSC_FEATURES_BIG_END_CODE_EN
 #define RSC_FEATURES_BTI_CODE_FR	"Validation des cibles de branche"
 
 #define RSC_FEATURES_EBEP_CODE_FR	\

diff --git a/aarch64/corefreq-cli-rsc.c b/aarch64/corefreq-cli-rsc.c
@@ -779,6 +779,7 @@ RESOURCE_ST Resource[] = {
 	LDT(RSC_INVARIANT),
 	LDT(RSC_FEATURES_ACPI),
 	LDT(RSC_FEATURES_AMU),
+	LDT(RSC_FEATURES_BIG_END),
 	LDT(RSC_FEATURES_BTI),
 	LDT(RSC_FEATURES_EBEP),
 	LDT(RSC_FEATURES_ECV),

diff --git a/aarch64/corefreq-cli-rsc.h b/aarch64/corefreq-cli-rsc.h
@@ -602,6 +602,7 @@ enum {
 	RSC_INVARIANT,
 	RSC_FEATURES_ACPI,
 	RSC_FEATURES_AMU,
+	RSC_FEATURES_BIG_END,
 	RSC_FEATURES_BTI,
 	RSC_FEATURES_EBEP,
 	RSC_FEATURES_ECV,

diff --git a/aarch64/corefreq-cli.c b/aarch64/corefreq-cli.c
@@ -2062,6 +2062,22 @@ REASON_CODE SysInfoFeatures(	Window *win,
 		RSC(FEATURES_AMU).CODE(), width - 23 - RSZ(FEATURES_AMU),
 		NULL
 	},
+	{
+		NULL,
+		RO(Shm)->Proc.Features.BigEnd_EL0 == 1,
+		attr_Feat,
+		2, "%s EL0%.*sBigEnd   [%7s]", RSC(FEATURES_BIG_END).CODE(),
+		width - 25 - RSZ(FEATURES_BIG_END),
+		NULL
+	},
+	{
+		NULL,
+		RO(Shm)->Proc.Features.BigEnd_EE == 1,
+		attr_Feat,
+		2, "%s EE|E0E%.*sBigEnd   [%7s]", RSC(FEATURES_BIG_END).CODE(),
+		width - 28 - RSZ(FEATURES_BIG_END),
+		NULL
+	},
 	{
 		NULL,
 		RO(Shm)->Proc.Features.EBEP == 1,
@@ -2118,6 +2134,7 @@ REASON_CODE SysInfoFeatures(	Window *win,
 		2, RO(Shm)->Proc.Features.GIC_vers ?
 			RO(Shm)->Proc.Features.GIC_frac ?
 			"%s v4.1%.*sGIC   [%7s]" : "%s v3.0%.*sGIC   [%7s]"
+		:	RO(Shm)->Proc.Features.GIC_frac ?
 			"%s     %.*sGIC   [%7s]" : "%s     %.*sGIC   [%7s]",
 		RSC(FEATURES_GIC).CODE(), width - 23 - RSZ(FEATURES_GIC),
 		NULL

diff --git a/aarch64/corefreqk.c b/aarch64/corefreqk.c
@@ -923,6 +923,24 @@ static void Query_Features(void *pArg)
 		iArg->Features->ExS = 0;
 		break;
 	}
+	switch (mmfr0.BigEnd_EL0) {
+	case 0b0001:
+		iArg->Features->BigEnd_EL0 = 1;
+		break;
+	case 0b0000:
+	default:
+		iArg->Features->BigEnd_EL0 = 0;
+		break;
+	}
+	switch (mmfr0.BigEnd) {
+	case 0b0001:
+		iArg->Features->BigEnd_EE = 1;
+		break;
+	case 0b0000:
+	default:
+		iArg->Features->BigEnd_EE = 0;
+		break;
+	}
 	switch (mmfr1.VH) {
 	case 0b0001:
 		iArg->Features->VHE = 1;

diff --git a/aarch64/coretypes.h b/aarch64/coretypes.h
@@ -832,7 +832,9 @@ typedef struct	/* BSP features.					*/
 			FGT		: 45-44,
 			FGT2		: 46-45,
 			ExS		: 47-46,
-			_Unused1_	: 64-47;
+			BigEnd_EL0	: 48-47,
+			BigEnd_EE	: 49-48,
+			_Unused1_	: 64-48;
 
 		Bit64	CSV2		:  4-0,
 			SSBS		:  8-4,