[AArch64] Virtual Address range

cyring · Feb 21, 2024 · 0f22f84 · 0f22f84
1 parent 881c56b
commit 0f22f84
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Showing 8 changed files with 27 additions and 1 deletion.
diff --git a/aarch64/corefreq-cli-json.c b/aarch64/corefreq-cli-json.c
@@ -545,6 +545,8 @@ void JsonSysInfo(RO(SHM_STRUCT) *RO(Shm))
 				json_key(&s, "MMFR2");
 				{
 					json_start_object(&s);
+					json_key(&s, "VARange");
+					json_literal(&s, "%u", (unsigned) RO(Shm)->Proc.Features.VARange);
 					json_key(&s, "UAO");
 					json_literal(&s, "%u", (unsigned) RO(Shm)->Proc.Features.UAO);
 					json_end_object(&s);

diff --git a/aarch64/corefreq-cli-rsc-en.h b/aarch64/corefreq-cli-rsc-en.h
@@ -842,6 +842,7 @@
 #define RSC_FEATURES_TME_CODE_EN	"Transactional Memory Extension"
 #define RSC_FEATURES_TSC_CODE_EN	"Time Stamp Counter"
 #define RSC_FEATURES_UAO_CODE_EN	"User Access Override"
+#define RSC_FEATURES_VA_CODE_EN 	"Virtual Address range"
 #define RSC_FEATURES_VHE_CODE_EN	"Virtualization Host Extensions"
 #define RSC_FEAT_SECTION_MECH_CODE_EN	"Mitigation mechanisms"
 #define RSC_FEAT_SECTION_SEC_CODE_EN	"Security Features"

diff --git a/aarch64/corefreq-cli-rsc-fr.h b/aarch64/corefreq-cli-rsc-fr.h
@@ -547,6 +547,7 @@ do echo -en "$h$l\t""\xc3""\x$h$l""\t"; done; done;echo
 #define RSC_FEATURES_TME_CODE_FR  "Extension de m""\xa9""moire transactionnelle"
 #define RSC_FEATURES_TSC_CODE_FR	"Compteur d'horodatage"
 #define RSC_FEATURES_UAO_CODE_FR       "Surcharge de l'acc""\xa8""s utilisateur"
+#define RSC_FEATURES_VA_CODE_FR 	"Plage d'adressage virtuel"
 #define RSC_FEATURES_VHE_CODE_FR    "Extensions d'H""\xb4""te de Virtualisation"
 #define RSC_FEAT_SECTION_MECH_CODE_FR	"M""\xa9""canismes d'att""\xa9""nuation"
 #define RSC_FEAT_SECTION_SEC_CODE_FR	"Fonctions de s""\xa9""curit""\xa9"

diff --git a/aarch64/corefreq-cli-rsc.c b/aarch64/corefreq-cli-rsc.c
@@ -800,6 +800,7 @@ RESOURCE_ST Resource[] = {
 	LDT(RSC_FEATURES_TME),
 	LDT(RSC_FEATURES_TSC),
 	LDT(RSC_FEATURES_UAO),
+	LDT(RSC_FEATURES_VA),
 	LDT(RSC_FEATURES_VHE),
 	LDT(RSC_FEAT_SECTION_MECH),
 	LDT(RSC_FEAT_SECTION_SEC),

diff --git a/aarch64/corefreq-cli-rsc.h b/aarch64/corefreq-cli-rsc.h
@@ -623,6 +623,7 @@ enum {
 	RSC_FEATURES_TME,
 	RSC_FEATURES_TSC,
 	RSC_FEATURES_UAO,
+	RSC_FEATURES_VA,
 	RSC_FEATURES_VHE,
 	RSC_FEAT_SECTION_MECH,
 	RSC_FEAT_SECTION_SEC,

diff --git a/aarch64/corefreq-cli.c b/aarch64/corefreq-cli.c
@@ -2248,6 +2248,20 @@ REASON_CODE SysInfoFeatures(	Window *win,
 		width - 18 - RSZ(FEATURES_UAO),
 		NULL
 	},
+	{
+		NULL,
+		RO(Shm)->Proc.Features.VARange <= 0b10,
+		attr_Feat,
+		2, RO(Shm)->Proc.Features.VARange == 0b00 ?
+			"%s 48 bits%.*sVA   [%7s]"
+		: RO(Shm)->Proc.Features.VARange == 0b01 ?
+			"%s 52 bits%.*sVA   [%7s]"
+		: RO(Shm)->Proc.Features.VARange == 0b10 ?
+			"%s 56 bits%.*sVA   [%7s]"
+		:	"%s *RSVD* %.*sVA   [%7s]",
+		RSC(FEATURES_VA).CODE(), width - 25 - RSZ(FEATURES_VA),
+		NULL
+	},
 	{
 		NULL,
 		RO(Shm)->Proc.Features.VHE == 1,

diff --git a/aarch64/corefreqk.c b/aarch64/corefreqk.c
@@ -973,6 +973,11 @@ static void Query_Features(void *pArg)
 		iArg->Features->UAO = 0;
 		break;
 	}
+	if (mmfr2.VARange < 0b0011) {
+		iArg->Features->VARange = mmfr2.VARange;
+	} else {
+		iArg->Features->VARange = 0b11;
+	}
 	switch (pfr0.FP) {
 	case 0b0000:
 	case 0b0001:

diff --git a/aarch64/coretypes.h b/aarch64/coretypes.h
@@ -835,7 +835,8 @@ typedef struct	/* BSP features.					*/
 			BigEnd_EL0	: 48-47,
 			BigEnd_EE	: 49-48,
 			PARange 	: 53-49,
-			_Unused1_	: 64-53;
+			VARange 	: 62-59,
+			_Unused1_	: 64-62;
 
 		Bit64	CSV2		:  4-0,
 			SSBS		:  8-4,