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[AArch64] Number of AMU counters // Clean up unused resources
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@cyring
cyring committed Feb 11, 2024
1 parent 781d772 commit 0ecdee3
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Showing 13 changed files with 25 additions and 333 deletions.
2 changes: 0 additions & 2 deletions aarch64/corefreq-api.h
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Original file line number Diff line number Diff line change
Expand Up @@ -304,7 +304,6 @@ typedef struct
FEATURES Features;

BitCC CR_Mask __attribute__ ((aligned (16)));
BitCC TurboBoost_Mask __attribute__ ((aligned (16)));
BitCC HWP_Mask __attribute__ ((aligned (16)));
BitCC SPEC_CTRL_Mask __attribute__ ((aligned (16)));

Expand Down Expand Up @@ -387,7 +386,6 @@ typedef struct
} Power;
} Delta __attribute__ ((aligned (8)));

BitCC TurboBoost __attribute__ ((aligned (16)));
BitCC HWP __attribute__ ((aligned (16)));
BitCC VM __attribute__ ((aligned (16)));
BitCC CLRBHB __attribute__ ((aligned (16)));
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14 changes: 4 additions & 10 deletions aarch64/corefreq-cli-json.c
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Original file line number Diff line number Diff line change
Expand Up @@ -702,10 +702,6 @@ void JsonSysInfo(RO(SHM_STRUCT) *RO(Shm))
json_literal(&s, "%u", (unsigned) RO(Shm)->Proc.Features.Power.PTM);
json_key(&s, "HWP_Registers");
json_literal(&s, "%u", (unsigned) RO(Shm)->Proc.Features.Power.HWP_Reg);
json_key(&s, "Turbo_V3");
json_literal(&s, "%u", (unsigned) RO(Shm)->Proc.Features.Power.Turbo_V3);
json_key(&s, "HCF_Cap");
json_literal(&s, "%u", (unsigned) RO(Shm)->Proc.Features.Power.HCF_Cap);

json_end_object(&s);
}
Expand All @@ -727,10 +723,10 @@ void JsonSysInfo(RO(SHM_STRUCT) *RO(Shm))
json_literal(&s, "%u", (unsigned) RO(Shm)->Proc.Features.PerfMon.CoreCycles);
json_key(&s, "InstrRetired");
json_literal(&s, "%u", (unsigned) RO(Shm)->Proc.Features.PerfMon.InstrRetired);
json_key(&s, "PMC_LLC");
json_literal(&s, "%u", (unsigned) RO(Shm)->Proc.Features.Factory.PMC.LLC);
json_key(&s, "PMC_NB");
json_literal(&s, "%u", (unsigned) RO(Shm)->Proc.Features.Factory.PMC.NB);
json_key(&s, "AMU_CG0NC");
json_literal(&s, "%u", (unsigned) RO(Shm)->Proc.Features.AMU.CG0NC);
json_key(&s, "AMU_CG1NC");
json_literal(&s, "%u", (unsigned) RO(Shm)->Proc.Features.AMU.CG1NC);

json_end_object(&s);
}
Expand Down Expand Up @@ -779,8 +775,6 @@ void JsonSysInfo(RO(SHM_STRUCT) *RO(Shm))
json_key(&s, "Technology");
{
json_start_object(&s);
json_key(&s, "Turbo");
json_literal(&s, "%llu", RO(Shm)->Proc.Technology.Turbo);
json_key(&s, "VM");
json_literal(&s, "%llu", RO(Shm)->Proc.Technology.VM);
json_key(&s, "IOMMU");
Expand Down
32 changes: 1 addition & 31 deletions aarch64/corefreq-cli-rsc-en.h
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Original file line number Diff line number Diff line change
Expand Up @@ -844,8 +844,6 @@
#define RSC_TECHNOLOGIES_TITLE_CODE_EN " Technologies "
#define RSC_TECHNOLOGIES_DCU_CODE_EN "Data Cache Unit"
#define RSC_TECHNOLOGIES_ICU_CODE_EN "Instruction Cache Unit"
#define RSC_TECHNOLOGIES_TURBO_CODE_EN "Turbo Boost"
#define RSC_TECHNOLOGIES_TBMT3_CODE_EN "Turbo Boost Max 3.0"
#define RSC_TECHNOLOGIES_VM_CODE_EN "Virtualization"
#define RSC_TECHNOLOGIES_IOMMU_CODE_EN "I/O MMU"
#define RSC_TECHNOLOGIES_SMT_CODE_EN "Simultaneous Multithreading"
Expand All @@ -860,7 +858,6 @@
#define RSC_GENERAL_CTRS_CODE_EN "General"
#define RSC_FIXED_CTRS_CODE_EN "Fixed"
#define RSC_PERF_MON_UNIT_BIT_CODE_EN "bits"
#define RSC_PERF_MON_HWCF_CODE_EN "P-State Hardware Coordination Feedback"
#define RSC_PERF_MON_CPPC_CODE_EN "Collaborative Processor Performance Control"
#define RSC_PERF_MON_PCT_CODE_EN "Processor Performance Control"
#define RSC_PERF_MON_PSS_CODE_EN "Performance Supported States"
Expand All @@ -879,7 +876,7 @@
#define RSC_PERF_MON_INST_RET_CODE_EN "Instructions Counter"

#define RSC_PERF_MON_PMC_COMM_CODE_EN \
" { Core performance monitoring, LLC cache, Northbridge } "
" { Core performance monitoring, AMU-CG0NC, AMU-CG1NC } "

#define RSC_PERF_MON_CPPC_COMM_CODE_EN " Firmware "

Expand Down Expand Up @@ -1368,19 +1365,8 @@
#define RSC_BOX_MODE_TITLE_CODE_EN " Experimental "

#define RSC_BOX_MODE_DESC_CODE_EN " CoreFreq Operation Mode "
#define RSC_BOX_TURBO_DESC_CODE_EN " Turbo Boost/Core Performance Boost "
#define RSC_BOX_C1A_DESC_CODE_EN " C1 Auto Demotion "
#define RSC_BOX_C3A_DESC_CODE_EN " C3 Auto Demotion "
#define RSC_BOX_C1U_DESC_CODE_EN " C1 UnDemotion "
#define RSC_BOX_C2U_DESC_CODE_EN " C2 UnDemotion "
#define RSC_BOX_C3U_DESC_CODE_EN " C3 UnDemotion "
#define RSC_BOX_C6D_DESC_CODE_EN " Core C6 Demotion "
#define RSC_BOX_MC6_DESC_CODE_EN " Module C6 Demotion "
#define RSC_BOX_CC6_DESC_CODE_EN " Core C6 State "
#define RSC_BOX_PC6_DESC_CODE_EN " Package C6 State "
#define RSC_BOX_HWP_DESC_CODE_EN " Hardware-Controlled Performance "
#define RSC_BOX_FMW_DESC_CODE_EN " Firmware Controlled Performance "
#define RSC_BOX_HSMP_DESC_CODE_EN " Host System Management Port "

#define RSC_BOX_NOMINAL_MODE_COND0_CODE_EN \
" Nominal operating mode "
Expand Down Expand Up @@ -1634,25 +1620,9 @@
#define RSC_SETTINGS_ROUTE_HALT_CODE " HALT"
#define RSC_SETTINGS_ROUTE_MWAIT_CODE " MWAIT"

#define RSC_BOX_TURBO_TITLE_CODE " Turbo "

#define RSC_BOX_C1A_TITLE_CODE " C1A "
#define RSC_BOX_C3A_TITLE_CODE " C3A "
#define RSC_BOX_C1U_TITLE_CODE " C1U "
#define RSC_BOX_C2U_TITLE_CODE " C2U "
#define RSC_BOX_C3U_TITLE_CODE " C3U "

#define RSC_BOX_CC6_TITLE_CODE " CC6 "
#define RSC_BOX_C6D_TITLE_CODE " C6D "

#define RSC_BOX_MC6_TITLE_CODE " MC6 "
#define RSC_BOX_PC6_TITLE_CODE " PC6 "
#define RSC_BOX_CPPC_TITLE_CODE " CPPC "

#define RSC_BOX_HWP_TITLE_CODE " HWP "

#define RSC_BOX_HSMP_TITLE_CODE " HSMP "

#define RSC_BOX_CFG_TDP_BLANK_CODE " "

#define RSC_BOX_PWR_OFFSET_00_CODE " +50 watts "
Expand Down
34 changes: 1 addition & 33 deletions aarch64/corefreq-cli-rsc-fr.h
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Original file line number Diff line number Diff line change
Expand Up @@ -545,8 +545,6 @@ do echo -en "$h$l\t""\xc3""\x$h$l""\t"; done; done;echo
#define RSC_TECHNOLOGIES_TITLE_CODE_FR " Technologies "
#define RSC_TECHNOLOGIES_DCU_CODE_FR "Unit""\xa9"" de cache de donn""\xa9""es"
#define RSC_TECHNOLOGIES_ICU_CODE_FR "Unit""\xa9"" de cache d'instructions"
#define RSC_TECHNOLOGIES_TURBO_CODE_FR "Turbo Boost"
#define RSC_TECHNOLOGIES_TBMT3_CODE_FR "Turbo Boost Max 3.0"
#define RSC_TECHNOLOGIES_VM_CODE_FR "Virtualisation"
#define RSC_TECHNOLOGIES_IOMMU_CODE_FR "MMU E/S"
#define RSC_TECHNOLOGIES_SMT_CODE_FR "Multithreading simultan""\xa9"
Expand All @@ -561,7 +559,6 @@ do echo -en "$h$l\t""\xc3""\x$h$l""\t"; done; done;echo
#define RSC_GENERAL_CTRS_CODE_FR "G""\xa9""n""\xa9""raux"
#define RSC_FIXED_CTRS_CODE_FR "Fixes"
#define RSC_PERF_MON_UNIT_BIT_CODE_FR "bits"
#define RSC_PERF_MON_HWCF_CODE_FR "P-State Hardware Coordination Feedback"
#define RSC_PERF_MON_CPPC_CODE_FR \
"Contr""\xb4""le collaboratif des performances du processeur"

Expand All @@ -581,8 +578,7 @@ do echo -en "$h$l\t""\xc3""\x$h$l""\t"; done; done;echo
#define RSC_PERF_MON_CORE_CYCLE_CODE_FR "Core Cycles Counter"
#define RSC_PERF_MON_INST_RET_CODE_FR "Instructions Counter"

#define RSC_PERF_MON_PMC_COMM_CODE_FR \
" { Core performance monitoring, Cache LLC, Northbridge } "
#define RSC_PERF_MON_PMC_COMM_CODE_FR RSC_PERF_MON_PMC_COMM_CODE_EN

#define RSC_PERF_MON_CPPC_COMM_CODE_FR " Micrologiciel "

Expand Down Expand Up @@ -1019,40 +1015,12 @@ do echo -en "$h$l\t""\xc3""\x$h$l""\t"; done; done;echo
#define RSC_BOX_MODE_DESC_CODE_FR " CoreFreq mode " \
"op""\xa9""rationnel "

#define RSC_BOX_TURBO_DESC_CODE_FR " Turbo Boost/Core Performance Boost "

#define RSC_BOX_C1A_DESC_CODE_FR " Auto r""\xa9""trogradation" \
" C1 "

#define RSC_BOX_C3A_DESC_CODE_FR " Auto r""\xa9""trogradation" \
" C3 "

#define RSC_BOX_C1U_DESC_CODE_FR " Non-r""\xa9""trogradation" \
" C1 "

#define RSC_BOX_C2U_DESC_CODE_FR " Non-r""\xa9""trogradation" \
" C2 "

#define RSC_BOX_C3U_DESC_CODE_FR " Non-r""\xa9""trogradation" \
" C3 "

#define RSC_BOX_C6D_DESC_CODE_FR " C6 Core Demotion "
#define RSC_BOX_MC6_DESC_CODE_FR " C6 Module Demotion "

#define RSC_BOX_CC6_DESC_CODE_FR " Core ""\x89""tat" \
" C6 "

#define RSC_BOX_PC6_DESC_CODE_FR " Package ""\x89""tat" \
" C6 "

#define RSC_BOX_HWP_DESC_CODE_FR " Contr""\xb4""le Mat""\xa9""riel" \
" de la Performance"

#define RSC_BOX_FMW_DESC_CODE_FR " Contr""\xb4""le Firmware" \
" de la Performance"

#define RSC_BOX_HSMP_DESC_CODE_FR " Host System Management Port "

#define RSC_BOX_NOMINAL_MODE_COND0_CODE_FR \
" Fonctionnement" \
" nominal "
Expand Down
25 changes: 0 additions & 25 deletions aarch64/corefreq-cli-rsc.c
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Original file line number Diff line number Diff line change
Expand Up @@ -799,8 +799,6 @@ RESOURCE_ST Resource[] = {
LDT(RSC_TECHNOLOGIES_TITLE),
LDT(RSC_TECHNOLOGIES_DCU),
LDT(RSC_TECHNOLOGIES_ICU),
LDT(RSC_TECHNOLOGIES_TURBO),
LDT(RSC_TECHNOLOGIES_TBMT3),
LDT(RSC_TECHNOLOGIES_VM),
LDT(RSC_TECHNOLOGIES_VM_COMM),
LDT(RSC_TECHNOLOGIES_IOMMU),
Expand All @@ -822,7 +820,6 @@ RESOURCE_ST Resource[] = {
LDT(RSC_GENERAL_CTRS),
LDT(RSC_FIXED_CTRS),
LDT(RSC_PERF_MON_UNIT_BIT),
LDT(RSC_PERF_MON_HWCF),
LDT(RSC_PERF_MON_CPPC),
LDT(RSC_PERF_MON_PCT),
LDT(RSC_PERF_MON_PSS),
Expand Down Expand Up @@ -1379,32 +1376,10 @@ RESOURCE_ST Resource[] = {
LDT(RSC_BOX_AUTO_CLOCK_TITLE),
LDT(RSC_BOX_MODE_TITLE),
LDT(RSC_BOX_MODE_DESC),
LDQ(RSC_BOX_TURBO_TITLE),
LDT(RSC_BOX_TURBO_DESC),
LDQ(RSC_BOX_C1A_TITLE),
LDT(RSC_BOX_C1A_DESC),
LDQ(RSC_BOX_C3A_TITLE),
LDT(RSC_BOX_C3A_DESC),
LDQ(RSC_BOX_C1U_TITLE),
LDT(RSC_BOX_C1U_DESC),
LDQ(RSC_BOX_C2U_TITLE),
LDT(RSC_BOX_C2U_DESC),
LDQ(RSC_BOX_C3U_TITLE),
LDT(RSC_BOX_C3U_DESC),
LDT(RSC_BOX_C6D_DESC),
LDQ(RSC_BOX_MC6_TITLE),
LDT(RSC_BOX_MC6_DESC),
LDQ(RSC_BOX_CC6_TITLE),
LDQ(RSC_BOX_C6D_TITLE),
LDT(RSC_BOX_CC6_DESC),
LDQ(RSC_BOX_PC6_TITLE),
LDT(RSC_BOX_PC6_DESC),
LDQ(RSC_BOX_CPPC_TITLE),
LDQ(RSC_BOX_HWP_TITLE),
LDT(RSC_BOX_HWP_DESC),
LDT(RSC_BOX_FMW_DESC),
LDQ(RSC_BOX_HSMP_TITLE),
LDT(RSC_BOX_HSMP_DESC),
LDQ(RSC_BOX_BLANK_DESC),
LDT(RSC_BOX_NOMINAL_MODE_COND0),
LDT(RSC_BOX_NOMINAL_MODE_COND1),
Expand Down
25 changes: 0 additions & 25 deletions aarch64/corefreq-cli-rsc.h
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Original file line number Diff line number Diff line change
Expand Up @@ -622,8 +622,6 @@ enum {
RSC_TECHNOLOGIES_TITLE,
RSC_TECHNOLOGIES_DCU,
RSC_TECHNOLOGIES_ICU,
RSC_TECHNOLOGIES_TURBO,
RSC_TECHNOLOGIES_TBMT3,
RSC_TECHNOLOGIES_VM,
RSC_TECHNOLOGIES_VM_COMM,
RSC_TECHNOLOGIES_IOMMU,
Expand All @@ -645,7 +643,6 @@ enum {
RSC_GENERAL_CTRS,
RSC_FIXED_CTRS,
RSC_PERF_MON_UNIT_BIT,
RSC_PERF_MON_HWCF,
RSC_PERF_MON_CPPC,
RSC_PERF_MON_PCT,
RSC_PERF_MON_PSS,
Expand Down Expand Up @@ -1202,32 +1199,10 @@ enum {
RSC_BOX_AUTO_CLOCK_TITLE,
RSC_BOX_MODE_TITLE,
RSC_BOX_MODE_DESC,
RSC_BOX_TURBO_TITLE,
RSC_BOX_TURBO_DESC,
RSC_BOX_C1A_TITLE,
RSC_BOX_C1A_DESC,
RSC_BOX_C3A_TITLE,
RSC_BOX_C3A_DESC,
RSC_BOX_C1U_TITLE,
RSC_BOX_C1U_DESC,
RSC_BOX_C2U_TITLE,
RSC_BOX_C2U_DESC,
RSC_BOX_C3U_TITLE,
RSC_BOX_C3U_DESC,
RSC_BOX_C6D_DESC,
RSC_BOX_MC6_TITLE,
RSC_BOX_MC6_DESC,
RSC_BOX_CC6_TITLE,
RSC_BOX_C6D_TITLE,
RSC_BOX_CC6_DESC,
RSC_BOX_PC6_TITLE,
RSC_BOX_PC6_DESC,
RSC_BOX_CPPC_TITLE,
RSC_BOX_HWP_TITLE,
RSC_BOX_HWP_DESC,
RSC_BOX_FMW_DESC,
RSC_BOX_HSMP_TITLE,
RSC_BOX_HSMP_DESC,
RSC_BOX_BLANK_DESC,
RSC_BOX_NOMINAL_MODE_COND0,
RSC_BOX_NOMINAL_MODE_COND1,
Expand Down
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