[AArch64] Macros renamed to SysRegRead and SysRegWrite

cyring · Feb 11, 2024 · 781d772 · 781d772
1 parent ccc8927
commit 781d772
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Showing 2 changed files with 21 additions and 21 deletions.
diff --git a/aarch64/corefreqk.c b/aarch64/corefreqk.c
@@ -566,7 +566,7 @@ static void Query_Features(void *pArg)
 		:
 		: "memory"
 	);
-	mmfr2.value = MOV_SR_GPR(ID_AA64MMFR2_EL1);
+	mmfr2.value = SysRegRead(ID_AA64MMFR2_EL1);
 
 	iArg->Features->Info.Signature.Stepping = midr.Revision
 						| (midr.Variant << 4);
@@ -1032,7 +1032,7 @@ static void Query_Features(void *pArg)
 		break;
 	}
 	if (iArg->Features->AMU_vers > 0) {
-		AMCGCR amcgc = {.value = MOV_SR_GPR(AMCGCR_EL0)};
+		AMCGCR amcgc = {.value = SysRegRead(AMCGCR_EL0)};
 		iArg->Features->PerfMon.FixCtrs += amcgc.CG0NC + amcgc.CG1NC;
 	}
 	switch (pfr0.RME) {
@@ -1124,7 +1124,7 @@ static void Query_Features(void *pArg)
 	}
     if (iArg->Features->SVE | iArg->Features->SME)
     {
-	volatile AA64ZFR0 zfr0 = {.value = MOV_SR_GPR(ID_AA64ZFR0_EL1)};
+	volatile AA64ZFR0 zfr0 = {.value = SysRegRead(ID_AA64ZFR0_EL1)};
 
 	switch (zfr0.SVE_F64MM) {
 	case 0b0001:
@@ -1215,7 +1215,7 @@ static void Query_Features(void *pArg)
 	}
     }
     if (iArg->Features->SME) {
-	volatile AA64SMFR0 smfr0 = {.value = MOV_SR_GPR(ID_AA64SMFR0_EL1)};
+	volatile AA64SMFR0 smfr0 = {.value = SysRegRead(ID_AA64SMFR0_EL1)};
 
 	switch (smfr0.SMEver) {
 	case 0b0010:
@@ -1280,7 +1280,7 @@ static void Query_Features(void *pArg)
     }
     if (Experimental && (iArg->HypervisorID == HYPERV_NONE)) {
 	/* Query the Cluster Configuration				*/
-	volatile CLUSTERCFR clustercfg = {.value = MOV_SR_GPR(CLUSTERCFR_EL1)};
+	volatile CLUSTERCFR clustercfg = {.value = SysRegRead(CLUSTERCFR_EL1)};
 	if (clustercfg.NUMCORE) {
 		iArg->SMT_Count = iArg->SMT_Count + clustercfg.NUMCORE;
 	}
@@ -1997,7 +1997,7 @@ void SystemRegisters(CORE_RO *Core)
 	volatile AA64MMFR1 mmfr1;
 	volatile AA64PFR0 pfr0;
 
-	isar2.value = MOV_SR_GPR(ID_AA64ISAR2_EL1);
+	isar2.value = SysRegRead(ID_AA64ISAR2_EL1);
 
 	__asm__ __volatile__(
 		"mrs	%[sctlr],	sctlr_el1"	"\n\t"
@@ -2029,14 +2029,14 @@ void SystemRegisters(CORE_RO *Core)
 	}
 	Core->Query.SCTLRX = 0;
     if (Experimental) {
-	volatile AA64MMFR3 mmfr3 = {.value = MOV_SR_GPR(ID_AA64MMFR3_EL1)};
+	volatile AA64MMFR3 mmfr3 = {.value = SysRegRead(ID_AA64MMFR3_EL1)};
 	if ((Core->Query.SCTLRX = mmfr3.SCTLRX) == 0b0001) {
-		Core->SystemRegister.SCTLR2 = MOV_SR_GPR(SCTLR2_EL1);
+		Core->SystemRegister.SCTLR2 = SysRegRead(SCTLR2_EL1);
 	}
     }
 	if (PUBLIC(RO(Proc))->Features.DIT) {
 		Core->SystemRegister.FLAGS |= (
-			MOV_SR_GPR(MRS_DIT) & (1LLU << FLAG_DIT)
+			SysRegRead(MRS_DIT) & (1LLU << FLAG_DIT)
 		);
 	}
 	if (isar2.CLRBHB == 0b0001) {
@@ -2109,7 +2109,7 @@ void SystemRegisters(CORE_RO *Core)
 	}
 	if (PUBLIC(RO(Proc))->Features.SSBS == 0b0010)
 	{
-		SSBS2 mrs_ssbs = {.value = MOV_SR_GPR(MRS_SSBS2)};
+		SSBS2 mrs_ssbs = {.value = SysRegRead(MRS_SSBS2)};
 
 	    if (mrs_ssbs.SSBS) {
 		BITSET_CC(LOCKLESS, PUBLIC(RW(Proc))->SSBS, Core->Bind);
@@ -2120,31 +2120,31 @@ void SystemRegisters(CORE_RO *Core)
 	}
 	if (PUBLIC(RO(Proc))->Features.PAN) {
 		Core->SystemRegister.FLAGS |= (
-			MOV_SR_GPR(MRS_PAN) & (1LLU << FLAG_PAN)
+			SysRegRead(MRS_PAN) & (1LLU << FLAG_PAN)
 		);
 	}
 	if (PUBLIC(RO(Proc))->Features.UAO) {
 		Core->SystemRegister.FLAGS |= (
-			MOV_SR_GPR(MRS_UAO) & (1LLU << FLAG_UAO)
+			SysRegRead(MRS_UAO) & (1LLU << FLAG_UAO)
 		);
 	}
 	if (PUBLIC(RO(Proc))->Features.MTE) {
 		Core->SystemRegister.FLAGS |= (
-			MOV_SR_GPR(MRS_TCO) & (1LLU << FLAG_TCO)
+			SysRegRead(MRS_TCO) & (1LLU << FLAG_TCO)
 		);
 	}
 	if (PUBLIC(RO(Proc))->Features.NMI) {
 		Core->SystemRegister.FLAGS |= (
-			MOV_SR_GPR(MRS_ALLINT) & (1LLU << FLAG_NMI)
+			SysRegRead(MRS_ALLINT) & (1LLU << FLAG_NMI)
 		);
 	}
 	if (PUBLIC(RO(Proc))->Features.EBEP) {
 		Core->SystemRegister.FLAGS |= (
-			MOV_SR_GPR(MRS_PM) & (1LLU << FLAG_PM)
+			SysRegRead(MRS_PM) & (1LLU << FLAG_PM)
 		);
 	}
 	if (PUBLIC(RO(Proc))->Features.SME) {
-		Core->SystemRegister.SVCR = MOV_SR_GPR(MRS_SVCR);
+		Core->SystemRegister.SVCR = SysRegRead(MRS_SVCR);
 	}
 	BITSET_CC(LOCKLESS, PUBLIC(RO(Proc))->CR_Mask, Core->Bind);
 }
@@ -2197,7 +2197,7 @@ static void PerCore_GenericMachine(void *arg)
 	Core->Boost[BOOST(MIN)] = 4;
 
     if (Experimental && (PUBLIC(RO(Proc))->HypervisorID == HYPERV_NONE)) {
-	cpupwrctl.value = MOV_SR_GPR(CPUPWRCTLR_EL1);
+	cpupwrctl.value = SysRegRead(CPUPWRCTLR_EL1);
 	Core->Query.CStateBaseAddr = cpupwrctl.WFI_RET_CTRL;
     }
 	Core->Query.Revision = revid.Revision;

diff --git a/aarch64/corefreqk.h b/aarch64/corefreqk.h
@@ -15,14 +15,14 @@
 #endif
 
 #if LINUX_VERSION_CODE >= KERNEL_VERSION(4, 9, 0)
-	#define MOV_SR_GPR(_reg)	read_sysreg_s(_reg)
-	#define MOV_GPR_SR(_val, _reg)	write_sysreg_s(_val, _reg)
+	#define SysRegRead(_reg)	read_sysreg_s(_reg)
+	#define SysRegWrite(_val, _reg) write_sysreg_s(_val, _reg)
 #else
-	#define MOV_SR_GPR(_reg) ({			\
+	#define SysRegRead(_reg) ({			\
 		UNUSED(_reg);				\
 		0;					\
 	})
-	#define MOV_GPR_SR(_val, _reg) ({		\
+	#define SysRegWrite(_val, _reg) ({		\
 		UNUSED(_val);				\
 		UNUSED(_reg);				\
 	})