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When the C_JALR instruction convert to bin format, we meet error. The rs1 should not be X0. #826
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Signed-off-by: Henrik Fegran <[email protected]>
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Fix for issue #826, illegal rs1 in C_JALR
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Update code from upstream repository https://github.com/google/riscv- dv to revision d7c50c1eb9abe85bd6673878fe2e98489cf5f07e * Fix `update_src_regs` for ZBB (Greg Chadwick) * Sample bitmanip instruction coverage (Greg Chadwick) * Fix for issue chipsalliance/riscv-dv#826, illegal rs1 in C_JALR (Henrik Fegran) Signed-off-by: Greg Chadwick <[email protected]>
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Update code from upstream repository https://github.com/google/riscv- dv to revision d7c50c1eb9abe85bd6673878fe2e98489cf5f07e * Fix `update_src_regs` for ZBB (Greg Chadwick) * Sample bitmanip instruction coverage (Greg Chadwick) * Fix for issue chipsalliance/riscv-dv#826, illegal rs1 in C_JALR (Henrik Fegran) Signed-off-by: Greg Chadwick <[email protected]>
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riscv-dv/src/isa/riscv_compressed_instr.sv line 317:
C_JALR:
binary = $sformatf("%4h", {get_func3(), 1'b1, 10'b0, get_c_opcode()});
the rs1 is X0.
However, according to riscv-spec-20191213.
the rs1 should not be X0,it is illegal!
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