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PentiumM
Thomas.Roehl edited this page Nov 5, 2015
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Intel Pentium M Performance groups
The input file for the events on Intel Pentium M can be found here.
The Intel® Pentium M microarchitecture provides 2 general-purpose counters consisting of a config and a counter register.
| Counter name | Event name |
|---|---|
| PMC0 | * |
| PMC1 | * |
| Option | Argument | Description | Comment |
|---|---|---|---|
| edgedetect | N | Set bit 18 in config register | |
| kernel | N | Set bit 17 in config register | |
| threshold | 8 bit hex value | Set bits 24-31 in config register | |
| invert | N | Set bit 23 in config register |
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Applications
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Config files
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Daemons
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Architectures
- Available counter options
- AMD
- Intel
- Intel Atom
- Intel Pentium M
- Intel Core2
- Intel Nehalem
- Intel NehalemEX
- Intel Westmere
- Intel WestmereEX
- Intel Xeon Phi (KNC)
- Intel Silvermont & Airmont
- Intel Goldmont
- Intel SandyBridge
- Intel SandyBridge EP/EN
- Intel IvyBridge
- Intel IvyBridge EP/EN/EX
- Intel Haswell
- Intel Haswell EP/EN/EX
- Intel Broadwell
- Intel Broadwell D
- Intel Broadwell EP
- Intel Skylake
- Intel Coffeelake
- Intel Kabylake
- Intel Xeon Phi (KNL)
- Intel Skylake X
- Intel Cascadelake SP/AP
- Intel Tigerlake
- Intel Icelake
- Intel Icelake X
- Intel SappireRapids
- ARM
- POWER
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Tutorials
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Miscellaneous
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Contributing