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ARM A57
Thomas Roehl edited this page Sep 10, 2018
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1 revision
The input file for the events on ARM® A57 (ARMv8) can be found here.
The ARM® A57 (ARMv8) microarchitecture provides 6 general-purpose counters consisting of a config and a counter register.
| Counter name | Event name |
|---|---|
| PMC0 | * |
| PMC1 | * |
| PMC2 | * |
| PMC3 | * |
| PMC4 | * |
| PMC5 | * |
Currently no options are available for ARM® A57 (ARMv8). All handling is managed by perf_event.
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Applications
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Config files
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Daemons
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Architectures
- Available counter options
- AMD
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- Intel Pentium M
- Intel Core2
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- Intel WestmereEX
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- ARM
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Tutorials
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Miscellaneous
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Contributing