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Uartdev merged to verilator and the relevant pushes applied to finish up the rest of the verilator testbench #107

Merged
merged 9 commits into from
Feb 15, 2021
Merged

Uartdev merged to verilator and the relevant pushes applied to finish up the rest of the verilator testbench #107

merged 9 commits into from
Feb 15, 2021

Commits on Feb 8, 2021

  1. integrate newer uart

    @jjts
    jjts committed Feb 8, 2021
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Commits on Feb 9, 2021

  1. working with new uart hardware, booting being improved, can run canno… 

    …t load yet
    @jjts
    jjts committed Feb 9, 2021
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Commits on Feb 10, 2021

  1. program loading working in simulation, not yet console

    @jjts
    jjts committed Feb 10, 2021
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  2. working with new console and uart

    @jjts
    jjts committed Feb 10, 2021
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  3. console abstracts from comm medium: preparing socket comm

    @jjts
    jjts committed Feb 10, 2021
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  4. add comm modules

    @jjts
    jjts committed Feb 10, 2021
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Commits on Feb 11, 2021

  1. console and boot exchanging files

    @jjts
    jjts committed Feb 11, 2021
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Commits on Feb 12, 2021

  1. Merge branch 'uartdev' into verilator 

    Merge uartdev to verilator
    @slahiruk
    slahiruk committed Feb 12, 2021
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Commits on Feb 15, 2021

  1. adding model top level code from FPGA wrapper for full system simulation

    @slahiruk
    slahiruk committed Feb 15, 2021
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