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1,304 workflow run results
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RFC: Negate 32-bit constants to inline Vixl Simulator run #4405: Pull request #3552 opened by alyssarosenzweig
April 2, 2024 18:08 4m 32s alyssarosenzweig:opt/negate-32b
alyssarosenzweig:opt/negate-32b
April 2, 2024 18:08 4m 32s
Negate more to inline constants Vixl Simulator run #4404: Pull request #3551 opened by alyssarosenzweig
April 2, 2024 17:58 2m 28s alyssarosenzweig:opt/negate-adds
alyssarosenzweig:opt/negate-adds
April 2, 2024 17:58 2m 28s
Validate that we have no crossblock liveness Vixl Simulator run #4403: Pull request #3550 synchronize by alyssarosenzweig
April 2, 2024 17:41 7m 24s alyssarosenzweig:ra/validate
alyssarosenzweig:ra/validate
April 2, 2024 17:41 7m 24s
Eliminate xblock liveness for shifts Vixl Simulator run #4402: Pull request #3548 synchronize by alyssarosenzweig
April 2, 2024 17:39 3m 32s alyssarosenzweig:ra/shifts-rework
alyssarosenzweig:ra/shifts-rework
April 2, 2024 17:39 3m 32s
Eliminate xblock liveness for shifts Vixl Simulator run #4401: Pull request #3548 synchronize by alyssarosenzweig
April 2, 2024 17:37 2m 50s alyssarosenzweig:ra/shifts-rework
alyssarosenzweig:ra/shifts-rework
April 2, 2024 17:37 2m 50s
Validate that we have no crossblock liveness Vixl Simulator run #4400: Pull request #3550 opened by alyssarosenzweig
April 2, 2024 17:34 2m 27s alyssarosenzweig:ra/validate
alyssarosenzweig:ra/validate
April 2, 2024 17:34 2m 27s
ConstProp: drop dead code Vixl Simulator run #4399: Pull request #3549 opened by alyssarosenzweig
April 2, 2024 17:22 2m 15s alyssarosenzweig:constprop/dce
alyssarosenzweig:constprop/dce
April 2, 2024 17:22 2m 15s
Eliminate xblock liveness for shifts Vixl Simulator run #4398: Pull request #3548 synchronize by alyssarosenzweig
April 2, 2024 15:31 12m 59s alyssarosenzweig:ra/shifts-rework
alyssarosenzweig:ra/shifts-rework
April 2, 2024 15:31 12m 59s
Eliminate xblock liveness for shifts Vixl Simulator run #4397: Pull request #3548 opened by alyssarosenzweig
April 2, 2024 15:31 11m 22s alyssarosenzweig:ra/shifts-rework
alyssarosenzweig:ra/shifts-rework
April 2, 2024 15:31 11m 22s
Merge pull request #3546 from alyssarosenzweig/flag/cleanup Vixl Simulator run #4396: Commit 37f2b41 pushed by alyssarosenzweig
April 2, 2024 15:29 9m 59s main
main
April 2, 2024 15:29 9m 59s
Merge pull request #3545 from alyssarosenzweig/opt/pf-scalar Vixl Simulator run #4395: Commit bd0b5ec pushed by alyssarosenzweig
April 2, 2024 15:28 7m 55s main
main
April 2, 2024 15:28 7m 55s
Merge pull request #3544 from alyssarosenzweig/ra/zero-multiple Vixl Simulator run #4394: Commit b632f72 pushed by alyssarosenzweig
April 2, 2024 15:27 2m 28s main
main
April 2, 2024 15:27 2m 28s
x87 Stack Optimization Vixl Simulator run #4393: Pull request #3547 opened by pmatos
April 2, 2024 13:05 1m 55s pmatos:wip_x87_stack
pmatos:wip_x87_stack
April 2, 2024 13:05 1m 55s
Merge pull request #3542 from alyssarosenzweig/ra/rep Vixl Simulator run #4392: Commit e8abc88 pushed by Sonicadvance1
April 2, 2024 11:24 2m 33s main
main
April 2, 2024 11:24 2m 33s
Merge pull request #3539 from alyssarosenzweig/ra/rol-ror2 Vixl Simulator run #4391: Commit 29c6281 pushed by Sonicadvance1
April 2, 2024 07:17 2m 34s main
main
April 2, 2024 07:17 2m 34s
Merge pull request #3538 from pmatos/OffsetofOoB Vixl Simulator run #4390: Commit 4214d9b pushed by Sonicadvance1
April 2, 2024 02:42 2m 5s main
main
April 2, 2024 02:42 2m 5s
Minor cleanups around flags Vixl Simulator run #4389: Pull request #3546 opened by alyssarosenzweig
April 1, 2024 20:43 2m 14s alyssarosenzweig:flag/cleanup
alyssarosenzweig:flag/cleanup
April 1, 2024 20:43 2m 14s
Merge pull request #3536 from alyssarosenzweig/ra/rcl-rcr Vixl Simulator run #4388: Commit cd9ffd2 pushed by Sonicadvance1
April 1, 2024 18:44 2m 35s main
main
April 1, 2024 18:44 2m 35s
Use scalar integer code to calculate PF Vixl Simulator run #4387: Pull request #3545 synchronize by alyssarosenzweig
April 1, 2024 18:15 5m 44s alyssarosenzweig:opt/pf-scalar
alyssarosenzweig:opt/pf-scalar
April 1, 2024 18:15 5m 44s
Use scalar integer code to calculate PF Vixl Simulator run #4386: Pull request #3545 opened by alyssarosenzweig
April 1, 2024 18:14 3m 45s alyssarosenzweig:opt/pf-scalar
alyssarosenzweig:opt/pf-scalar
April 1, 2024 18:14 3m 45s
Merge pull request #3541 from alyssarosenzweig/opt/clc Vixl Simulator run #4385: Commit b1ddd8c pushed by alyssarosenzweig
April 1, 2024 17:51 11m 9s main
main
April 1, 2024 17:51 11m 9s
Merge pull request #3543 from alyssarosenzweig/ra/dead-code Vixl Simulator run #4384: Commit f2d001e pushed by alyssarosenzweig
April 1, 2024 17:51 6m 20s main
main
April 1, 2024 17:51 6m 20s
OpcodeDispatcher: drop ZeroMultipleFlags Vixl Simulator run #4383: Pull request #3544 synchronize by alyssarosenzweig
April 1, 2024 17:50 3m 44s alyssarosenzweig:ra/zero-multiple
alyssarosenzweig:ra/zero-multiple
April 1, 2024 17:50 3m 44s
OpcodeDispatcher: drop ZeroMultipleFlags Vixl Simulator run #4382: Pull request #3544 opened by alyssarosenzweig
April 1, 2024 17:48 2m 13s alyssarosenzweig:ra/zero-multiple
alyssarosenzweig:ra/zero-multiple
April 1, 2024 17:48 2m 13s
Merge pull request #3534 from Sonicadvance1/move_ir_defines Vixl Simulator run #4381: Commit e2a0953 pushed by Sonicadvance1
April 1, 2024 17:00 2m 53s main
main
April 1, 2024 17:00 2m 53s