RFC: Negate 32-bit constants to inline #3552
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the arm ops are equiv, even though the x86 isn't (due to inverted carry). Signed-off-by: Alyssa Rosenzweig <[email protected]>
Signed-off-by: Alyssa Rosenzweig <[email protected]>
Signed-off-by: Alyssa Rosenzweig <[email protected]>
Signed-off-by: Alyssa Rosenzweig <[email protected]>
Signed-off-by: Alyssa Rosenzweig <[email protected]>
| "mov w20, #0xffffffcc", | ||
| "str w10, [x9, w20, sxtw]", | ||
| "sub w20, w9, #0x34 (52)", | ||
| "str w10, [x20]", |
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I think we need to teach a pass that stores with small offset in the range of [-256, 256) can inline the immediate. Which it looks like it doesn't understand the negative half of that equation yet.
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Mm.. I'm going to close this for now since RA is more pressing, can maybe revisit later if @pmatos doesn't beat me to it
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RFC because this regresses instruction count in certain cases with complex addressing modes, I'm not sure where this is going wrong / whether it's an easy fix. See instcountci.