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Fix for Feilong's review
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zifeihan committed Jan 12, 2025
1 parent 82024b3 commit 2d74b28
Showing 1 changed file with 1 addition and 1 deletion.
2 changes: 1 addition & 1 deletion src/hotspot/cpu/riscv/macroAssembler_riscv.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -2873,7 +2873,7 @@ void MacroAssembler::revb(Register Rd, Register Rs, Register tmp1, Register tmp2
void MacroAssembler::ror(Register dst, Register src, Register shift, Register tmp)
{
if (UseZbb) {
ror(dst, src, shift);
rorr(dst, src, shift);
return;
}

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