Add MacroAssembler::ror function

zifeihan · Jan 10, 2025 · 82024b3 · 82024b3
1 parent 3bcd76e
commit 82024b3
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Showing 2 changed files with 20 additions and 1 deletion.
diff --git a/src/hotspot/cpu/riscv/macroAssembler_riscv.cpp b/src/hotspot/cpu/riscv/macroAssembler_riscv.cpp
@@ -2869,6 +2869,24 @@ void MacroAssembler::revb(Register Rd, Register Rs, Register tmp1, Register tmp2
   orr(Rd, tmp1, Rd);
 }
 
+// rotate right with shift bits
+void MacroAssembler::ror(Register dst, Register src, Register shift, Register tmp)
+{
+  if (UseZbb) {
+    ror(dst, src, shift);
+    return;
+  }
+
+  assert_different_registers(dst, tmp);
+  assert_different_registers(src, tmp);
+
+  mv(tmp, 64);
+  sub(tmp, tmp, shift);
+  sll(tmp, src, tmp);
+  srl(dst, src, shift);
+  orr(dst, dst, tmp);
+}
+
 // rotate right with shift bits
 void MacroAssembler::ror(Register dst, Register src, uint32_t shift, Register tmp)
 {
@@ -4543,7 +4561,7 @@ void MacroAssembler::lookup_secondary_supers_table_var(Register r_sub_klass,
   beqz(result, L_success ? *L_success : L_fallthrough); // Found a match
 
   // Is there another entry to check? Consult the bitmap.
-  ror_reg(r_bitmap, r_bitmap, slot);
+  ror(r_bitmap, r_bitmap, slot);
   test_bit(t0, r_bitmap, 1);
   beqz(t0, L_fallthrough);
 

diff --git a/src/hotspot/cpu/riscv/macroAssembler_riscv.hpp b/src/hotspot/cpu/riscv/macroAssembler_riscv.hpp
@@ -961,6 +961,7 @@ class MacroAssembler: public Assembler {
   void revbw(Register Rd, Register Rs, Register tmp1 = t0, Register tmp2= t1);  // reverse bytes in lower word, sign-extend
   void revb(Register Rd, Register Rs, Register tmp1 = t0, Register tmp2 = t1);  // reverse bytes in doubleword
 
+  void ror(Register dst, Register src, Register shift, Register tmp = t0);
   void ror(Register dst, Register src, uint32_t shift, Register tmp = t0);
   void rolw(Register dst, Register src, uint32_t shift, Register tmp = t0);
   void andi(Register Rd, Register Rn, int64_t imm, Register tmp = t0);