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cAVS updates #31127

Merged
merged 15 commits into from
Jan 11, 2021
Merged

cAVS updates #31127

merged 15 commits into from
Jan 11, 2021

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lyakh
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@lyakh lyakh commented Jan 6, 2021

Now that SOF base is in "master," nashif#10 is replaced with this one. The commits are identical.

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CAVS and SOF parts LGTM.

dts/xtensa/intel/intel_cavs25.dtsi Show resolved Hide resolved

if not args.quiet:
log.inf('Signing with tool {}'.format(tool_path))

s = pathlib.Path(os.environ.get('ZEPHYR_BASE'))
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Use from zephyr_ext_common import ZEPHYR_BASE at top of file instead.

bootloader = str(b / 'zephyr' / 'bootloader.elf.mod')
kernel = str(b / 'zephyr' / 'zephyr.elf.mod')
out_bin = str(b / 'zephyr' / 'zephyr.ri')
out_xman = str(b / 'zephyr' / 'zephyr.ri.xman')
out_tmp = str(b / 'zephyr' / 'zephyr.rix')
conf_path = str(s / '..' / 'modules' / 'audio' / 'sof' / 'rimage' / 'config' / conf)
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Hard-coding the module location like this isn't so nice. How about something like storing its location in the cmake cache instead?

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@mbolivar-nordic thanks! Is this version better? It requires thesofproject/sof#3733 to go with it

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thesofproject/sof#3733 has been merged

@@ -18,8 +18,8 @@
#define L2_SRAM_SIZE (DT_REG_SIZE(DT_NODELABEL(sram0)))

#ifdef CONFIG_BOOTLOADER_MCUBOOT
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hmm, why do we have mcuboot here in the first place, we never use mcuboot with those platforms, I would just remove the whole thing.

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@nashif done

rimage dropped its "-m" parameter and switched over to using "-c"
for a configuration file, including a target name.

Add support for extended manifest for all cAVS versions.

Signed-off-by: Guennadi Liakhovetski <[email protected]>
On cAVS 1.5, 2.0 and 2.5 platforms the correct manifest address is
0xB0032000.

Signed-off-by: Guennadi Liakhovetski <[email protected]>
1. SOF doesn't have to be built in .bin format
2. don't include soc.c and soc_mp.c twice in cmake
3. remove an unused mailbox.h header

Signed-off-by: Guennadi Liakhovetski <[email protected]>
Some interrupts can be enabled by the ROM, e.g. the timer interrupt.
When then in Zephyr the interrupt controller is enabled, before
individual interrupts are configured, interrupts can arrive and lead
to the spurious interrupt handler being invoked. Fix thid by
disabling all child interrupts when configuring cAVS interrupt
controllers.

Signed-off-by: Guennadi Liakhovetski <[email protected]>
The current unused memory calculation is broken because it doesn't
take into account the stack area, allocated at the top of HP SRAM.
Until this is fixed disable powering down unused RAM.

Signed-off-by: Guennadi Liakhovetski <[email protected]>
Shim register location on cAVS 1.5 is different than on 1.8 and up,
fix it.

Signed-off-by: Guennadi Liakhovetski <[email protected]>
A configuration with CONFIG_MP_NUM_CPUS > 1 and CONFIG_IPM_CAVS_IDC not
defined is valid if COMFIG_SMP is disabled.

Signed-off-by: Guennadi Liakhovetski <[email protected]>
1. don't use "inline" in .c, let the compiler decide
2. remove superfluous parentheses
3. simplify a function by directly returning the result of a boolean
operation

Signed-off-by: Guennadi Liakhovetski <[email protected]>
RAM window layout differs between cAVS versions. Fix apparent
copy-paste definition blocks to match cAVS 1.8, 2.0 and 2.5.

Signed-off-by: Guennadi Liakhovetski <[email protected]>
Tigerlake H has less RAM and fewer cores. Both should be
supported, selectable at the board level. For now use the H
configuration as more readily available for testing.

Signed-off-by: Guennadi Liakhovetski <[email protected]>
shim.h on cAVS 2.5 contains register definitions, copy-pasted
from other architectures. Fix them to correct values.

Signed-off-by: Guennadi Liakhovetski <[email protected]>
CONFIG_BOOTLOADER_MCUBOOT is never used in cAVS builds, remove
code, supposedly supporting it.

Signed-off-by: Guennadi Liakhovetski <[email protected]>
On cAVS 1.8, 2.0 and 2.5 LSPGISTS and LSPGCTL are located in a
different shim register range, they cannot be accessed, using the
usual SHIM_BASE offset.

Signed-off-by: Guennadi Liakhovetski <[email protected]>
LPRAM_BASE and LPRAM_SIZE are duplicates of LP_SRAM_BASE and
LP_SRAM_SIZE respectively. Remove them and use LP_SRAM_*
consistently everywhere.

Signed-off-by: Guennadi Liakhovetski <[email protected]>
Use the existing ceiling_fraction() function instead of open-
coding it.

Signed-off-by: Guennadi Liakhovetski <[email protected]>
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lyakh commented Jan 11, 2021

@nashif @mbolivar-nordic what's the procedure in Zephyr - should I dismiss the remaining "changes requested" review or do I have to wait for the author's acknowledgement of the fix?

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nashif commented Jan 11, 2021

@nashif @mbolivar-nordic what's the procedure in Zephyr - should I dismiss the remaining "changes requested" review or do I have to wait for the author's acknowledgement of the fix?

lets give @mbolivar-nordic a chance to review.

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nashif commented Jan 11, 2021

@lyakh this will requires this one #31233

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sign.py bits look fine; thanks.

@nashif nashif merged commit cf00554 into zephyrproject-rtos:master Jan 11, 2021
@lyakh lyakh deleted the cavs branch January 12, 2021 06:27
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5 participants