Skip to content

Commit

Permalink
initial support Renesas RZ with RSIP
Browse files Browse the repository at this point in the history
  • Loading branch information
miyazakh committed Apr 25, 2024
1 parent cf05199 commit 7725cc1
Show file tree
Hide file tree
Showing 18 changed files with 1,023 additions and 45 deletions.
54 changes: 36 additions & 18 deletions IDE/Renesas/e2studio/RZN2L/Readme.md
Original file line number Diff line number Diff line change
Expand Up @@ -17,24 +17,27 @@ You can download and execute wolfBoot by e2Studio debugger. Use a USB connection
|Item|Name/Version|Note|
|:--|:--|:--|
|Board|Renesas RZN2L RSK||
|Device|R9A07G084M04GBG||
|Device|R9A07G084M08GBG||
|Toolchain|GCC ARM Embedded 10.3.1.20210824|Included in GCC for Renesas RZ|
|FSP Version|1.3.0|Download from Renesas site|
|IDE|e2studio 2024-01.1 (24.1.1)|Download from Renesas site|
|SEGGER J-Link|J-Link Commander V7.94j |Download from J-Link|
|Key tool|keygen and sign|Included in wolfBoot|


|FIT Components|Version|
|:--|:--|
|Board Support Package Common Files|v1.3.0|
|I/O Port|v1.3.0|
|Arm CMSIS Version 5 - Core (M)|v5.7.0+renesas.1|
|Board support package for R9A07G084M04GBG|v1.3.0|
|Board support package for RZN2L|v1.3.0|
|Board support package for RZN2L - FSP Data|v1.3.0|
|RSK+RZN2L Board Support Files (xSPI0 x1 boot mode)|v1.3.0|
|SDRAM on Bus State Controller|v1.3.0|
|FIT Components|Version|Note|
|:--|:--|:--|
|Board Support Package Common Files|v1.3.0||
|I/O Port|v1.3.0||
|Arm CMSIS Version 5 - Core (M)|v5.7.0+renesas.1||
|Board support package for R9A07G084M04GBG|v1.3.0|Note1|
|Board support package for RZN2L|v1.3.0||
|Board support package for RZN2L - FSP Data|v1.3.0||
|RSK+RZN2L Board Support Files (xSPI0 x1 boot mode)|v1.3.0||
|SDRAM on Bus State Controller|v1.3.0||

Note1:\
To use RSIP drive, a devvice type should be `R9A07G084M04GBG`. However, choosing `R9A07G084M04GBG` won't allow to select `RSK+RZN2L` board. This example uses LED and external flash memory on `RSK + RZN2L` board. Therefore, the example temporary `R9A07G084M04GBG` for the device type. Updating e2studio or fsp could resolve the issue.


### 2-2. Project folders
Expand Down Expand Up @@ -147,15 +150,23 @@ ORIGINAL
BSP_TARGET_ARM void mpu_cache_init (void)
{
...
#if BSP_CFG_C_RUNTIME_INIT
#if BSP_CFG_C_RUNTIME_INIT && !defined(EXTERNAL_LOADER)
/* Copy the loader data from external Flash to internal RAM. */
bsp_loader_data_init();
/* Clear loader bss section in internal RAM. */
bsp_loader_bss_init();
#endif
...
#if !(BSP_CFG_RAM_EXECUTION)
/* Copy the application program from external Flash to internal RAM. */
bsp_copy_to_ram();
/* Clear bss section in internal RAM. */
bsp_application_bss_init();
#endif
...
}
```
Expand All @@ -171,12 +182,19 @@ if BSP_CFG_C_RUNTIME_INIT && !defined(EXTERNAL_LOADER)
/* Copy the loader data from external Flash to internal RAM. */
bsp_loader_data_init();
....
#if !(BSP_CFG_RAM_EXECUTION) && !defined(EXTERNAL_LOADER)
/* Clear loader bss section in internal RAM. */
bsp_loader_bss_init();
#endif
...
#if !(BSP_CFG_RAM_EXECUTION)
/* Copy the application program from external Flash to internal RAM. */
bsp_copy_to_ram();
/* bsp_copy_to_ram(); */
/* Clear bss section in internal RAM. */
bsp_application_bss_init();
#endif
...
}
```
Expand Down Expand Up @@ -324,7 +342,7 @@ To run the application,
+ Select `J-Link ARM`. Click OK.
+ Select `R9A07G084M04`. Click OK.

This simple application just downloads binary files defined in `Flash_section.s` and `Flash_update.s` through J-Link Flash Downloader. `Flash_update.s` doesn't includes `the app v2` initially.
This simple application just downloads binary files defined in `Flash_section.s` and `Flash_update.s` through J-Link Flash Downloader. `Flash_update.s` doesn't include `the app v2` initially.

Flash_update.s

Expand Down Expand Up @@ -394,15 +412,15 @@ Type "connect" to establish a target connection, '?' for help
J-Link>connect
Please specify device / core. <Default>: R9A07G084M04
Type '?' for selection dialog
Device>R9A07G084M04GBG
Device>R9A07G084M08GBG
Please specify target interface:
J) JTAG (Default)
S) SWD
T) cJTAG
TIF>S
Specify target interface speed [kHz]. <Default>: 4000 kHz
Speed>
Device "R9A07G084M04" selected.
Device "R9A07G084M08" selected.
...
J-Link>exec EnableEraseAllFlashBanks
```
Expand Down
Loading

0 comments on commit 7725cc1

Please sign in to comment.