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Glossary
-
gateware
is for configuration of the FPGA. It is the "hardware description". -
firmware
is software which runs on a CPU (it can be eitherSoftCPU
orHardCPU
). -
The
gateware
can include aSoftCPU
which runsfirmware
. -
Most HDMI2USB boards have two
firmware
blobs,- firmware which runs on the SoftCPU inside the gateware,
- firmware which runs on the Cypress FX2 USB interface chip attached to the FPGA.
-
platform
is the board configuration (IE generally a board + expansion modules). -
target
is the FPGA System on Chip configuration
-
Migen
is thePython HDL
which allows easy creation of gateware to run on an FPGA. It includes all the primitives needed to write things for the FPGA -
MiSoC
is aSoC
(System on Chip) which usesMigen
. It includes;- Multiple
SoftCPU
implementations, - a
CSR
(Config/Control Status Registers) bus - Bunch of peripherals
- Multiple
-
LiteX
is @enjoy-digital 's soft fork ofMigen+MiSoC
.- LiteX combines both
Migen+MiSoC
into one repo. - LiteX includes legacy features removed from Migen+MiSoC which are still in use.
- LiteX includes more experimental features that have not made it to Migen/MiSoC (and may never make it into Migen/MiSoC).
- LiteX code should be easily portable to Migen/MiSoC if legacy/experimental features are not used and is done regularly.
- LiteX combines both
-
LiteEth, LiteDRAM, liteSATA, litePCIe are all cores which provide functionality.
- LiteEth is heavily used inside liteX
-
A
SoftCPU
is a CPU which is defined by a HDL (like Verilog, VHDL or Migen) and is included in the gateware inside a FPGA. As the definition can be changed when creating the gateware,SoftCPU
s are highly customisable. -
A
HardCPU
is a CPU which is predefined piece of hardware. As it physical hardware it can't be changed. -
Most manufactures sell chips which include a FPGA fabric and a
HardCPU
in one package.- These are often called
SoC
(System on Chip) FPGAs. - Generally the
HardCPU
is an ARM these days. (Although PowerPC was previously fairly common.) - Xilinx's range is called the
Zynq
. - Altera have the Cyclone V
SoC
series.
- These are often called
-
A
SoftCPU
runsfirmware
.-
Normally the first
firmware
is a small program like a "BIOS" which does initilisation (like setting up main ram, running memtest, etc) before loading a more useful firmware into "main ram" and jumping it. -
The "BIOS" is normally embedded inside the gateware. However as this takes up resources that can't be reused, on smaller boards the BIOS is executed directly from external flash (normal SPI flash).
-
The "BIOS" in MiSoC/LiteX can load the primary firmware from;
- FPGA ROM
- Memory mapped SPI flash
- Serial download (using flterm)
- TFTP (via liteEth)
-
-
There are a bunch of common 32bit
SoftCPU
implementations; ProprietarySoftCPU
s are;- Xilinx's MicroBlaze
- Altera's Nios2
FOSS
SoftCPU
s are;- LatticeMico32 - lm32
- OpenRisc - mor1kx
- Clifford's Pico Risc-V
- J-Core - sh4/sh2 implementation
- ZPU - ???
-
MiSoC supports
lm32
andmor1kx
. -
LiteX supports
lm32
,mor1kx
and has WIP support forpico risc-v
and (maybe) soonJ-Core
.
-
FPGAs (generally) loose their "configuration" when they loose power or are reset. When powered on they will load their configuration from a flash chip (normally SPI flash) on the FPGA board.
-
Loading
means to temporarily put something (gateware, firmware, etc) onto a device. After a power cycle, the device will return to the flashed configuration. -
Flashing
means to permanently put something (gateware, firmware, etc) onto a device. After a power cycle, the device will reload the flashed configuration. -
Flashing is the process of writing a new configuration to the flash chip.
-
Flashing is generally slower than loading because it requires you to erase the contents of the flash, write the new contents and then verify the result.
-
Flashing is sometimes done by loading a "flash proxy" gateware onto the FPGA, which then allows the computer to communicate with the flash chip.
-
Some devices only support flashing and not loading (IE MimasV2)