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Tighten up a couple of spots in the unit tests (#1656)
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A couple of spots in the unit tests fail in the pipelines.
One because of a bad bounce near zero, one because of
(I think) a threading issue.

Address both.

Closes #1654
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baconpaul authored Mar 22, 2020
1 parent f753636 commit 2e7b114
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Showing 2 changed files with 8 additions and 13 deletions.
18 changes: 6 additions & 12 deletions src/headless/UnitTestsDSP.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -223,37 +223,31 @@ TEST_CASE( "Unison at Sample Rates", "[osc]" )
}
}

SECTION( "Window Oscillator" )
SECTION( "Test Each Oscillator" )
{
for( auto sr : srs )
{
INFO( "Window test at " << sr );
INFO( "Window Oscillator test at " << sr );
auto surge = Surge::Headless::createSurge(sr);

assertRelative(surge, "test-data/patches/Window-Sin-Uni2-Relative.fxp");
assertAbsolute(surge, "test-data/patches/Window-Sin-Uni2-Absolute.fxp");
randomAbsolute(surge, "test-data/patches/Window-Sin-Uni2-Absolute.fxp");
}
}

SECTION( "Classic Oscillator" )
{

for( auto sr : srs )
{
INFO( "Classic test at " << sr );
INFO( "Classic Oscillator test at " << sr );
auto surge = Surge::Headless::createSurge(sr);

assertRelative(surge, "test-data/patches/Classic-Uni2-Relative.fxp");
assertAbsolute(surge, "test-data/patches/Classic-Uni2-Absolute.fxp");
randomAbsolute(surge, "test-data/patches/Classic-Uni2-Absolute.fxp");
}
}

SECTION( "SH Oscillator" )
{

for( auto sr : srs )
{
INFO( "SH test at " << sr );
INFO( "SH Oscillator test at " << sr );
auto surge = Surge::Headless::createSurge(sr);

assertRelative(surge, "test-data/patches/SH-Uni2-Relative.fxp");
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3 changes: 2 additions & 1 deletion src/headless/UnitTestsMOD.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -440,7 +440,8 @@ TEST_CASE( "ADSR Envelope Behaviour", "[mod]" )
auto sz = std::min( surgeA.size(), replA.size() );
for( auto i=0; i<sz; ++i )
{
REQUIRE( replA[i].second == Approx( surgeA[i].second ).margin( 1e-6 ) );
if( replA[i].second > 1e-6 ) // CI pipelines bounce around zero badly
REQUIRE( replA[i].second == Approx( surgeA[i].second ).margin( 1e-6 ) );
}
};

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