Merge #135

135: remove spsc / pool / mpmc modules on targets w/o atomic / CAS support r=japaric a=japaric

closes #123

Co-authored-by: Jorge Aparicio <[email protected]>

.travis.yml

@@ -12,6 +12,11 @@ matrix:
       rust: stable
       if: branch != master
 
+    # does not support atomic loads
+    - env: TARGET=riscv32imc-unknown-none-elf
+      rust: stable
+      if: branch != master
+
     # build docs on master
     - env: TARGET=x86_64-unknown-linux-gnu
       rust: nightly

build.rs

@@ -19,5 +19,26 @@ fn main() -> Result<(), Box<dyn Error>> {
         println!("cargo:rustc-cfg=armv8m_main");
     }
 
+    // built-in targets with no atomic / CAS support as of nightly-2019-12-17
+    // see the `no-atomics.sh` / `no-cas.sh` script sitting next to this file
+    match &target[..] {
+        "thumbv6m-none-eabi"
+        | "msp430-none-elf"
+        | "riscv32i-unknown-none-elf"
+        | "riscv32imc-unknown-none-elf" => {}
+
+        _ => {
+            println!("cargo:rustc-cfg=has_cas");
+        }
+    };
+
+    match &target[..] {
+        "msp430-none-elf" | "riscv32i-unknown-none-elf" | "riscv32imc-unknown-none-elf" => {}
+
+        _ => {
+            println!("cargo:rustc-cfg=has_atomics");
+        }
+    };
+
     Ok(())
 }

no-atomics.sh

@@ -0,0 +1,14 @@
+#!/bin/bash
+
+set -euo pipefail
+
+main() {
+    IFS='
+'
+    for t in $(rustc --print target-list); do
+        rustc +nightly --print cfg --target $t | grep 'target_has_atomic_load_store=' >/dev/null || echo $t
+    done
+
+}
+
+main

no-cas.sh

@@ -0,0 +1,14 @@
+#!/bin/bash
+
+set -euo pipefail
+
+main() {
+    IFS='
+'
+    for t in $(rustc --print target-list); do
+        rustc +nightly --print cfg --target $t | grep 'target_has_atomic=' >/dev/null || echo $t
+    done
+
+}
+
+main

src/i.rs

@@ -2,6 +2,7 @@
 
 use core::{marker::PhantomData, mem::MaybeUninit};
 
+#[cfg(has_atomics)]
 use crate::spsc::{Atomic, MultiCore};
 
 /// `const-fn` version of [`BinaryHeap`](../binary_heap/struct.BinaryHeap.html)
@@ -16,6 +17,7 @@ pub struct LinearMap<A> {
 }
 
 /// `const-fn` version of [`spsc::Queue`](../spsc/struct.Queue.html)
+#[cfg(has_atomics)]
 pub struct Queue<A, U = usize, C = MultiCore> {
     // this is from where we dequeue items
     pub(crate) head: Atomic<U, C>,

src/lib.rs

@@ -89,10 +89,11 @@ mod ser;
 
 pub mod binary_heap;
 pub mod i;
-#[cfg(not(armv6m))]
+#[cfg(has_cas)]
 pub mod mpmc;
-#[cfg(not(armv6m))]
+#[cfg(has_cas)]
 pub mod pool;
+#[cfg(has_atomics)]
 pub mod spsc;
 
 mod sealed;

src/mpmc.rs

@@ -1,5 +1,7 @@
 //! A fixed capacity Multiple-Producer Multiple-Consumer (MPMC) lock-free queue
 //!
+//! NOTE: This module is not available on targets that do *not* support CAS operations, e.g. ARMv6-M
+//!
 //! # Example
 //!
 //! This queue can be constructed in "const context". Placing it in a `static` variable lets *all*

src/pool/mod.rs

@@ -1,5 +1,7 @@
 //! A heap-less, interrupt-safe, lock-free memory pool (\*)
 //!
+//! NOTE: This module is not available on targets that do *not* support CAS operations, e.g. ARMv6-M
+//!
 //! (\*) Currently, the implementation is only lock-free *and* `Sync` on ARMv7-M devices
 //!
 //! # Examples