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Add SiFive VCIX state register #56

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Add SiFive VCIX state register #56

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8 changes: 8 additions & 0 deletions src/toolchain-conventions.adoc
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Expand Up @@ -367,6 +367,14 @@ specification, and in the draft
https://github.com/openhwgroup/core-v-sw/blob/master/specifications/corev-builtin-spec.md[CORE-V Builtin Function]
specification.

=== List of vendor CSRs
.List of vendor CSRs
[%autowidth]
|===
|*Vendor* |*Name* |*Description*
|SiFive |sf.vcix_state |This dummy CSR is used to prevent the scheduler to reorder between SiFive vector instructions defined in `XSFVCP` extension.
|===

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This document should not become a registry of all vendor CSRs (or vendor instructions).
Instead, let's restrict ourselves to vendor prefixes and vendor extensions with the intent to avoid potential name collisions.

We've defined the vendor prefixes to be equal for instructions and CSRs (see the section "CSR naming scheme" above). A SiFive vendor prefix (sf.) and the XSFVCP extension are already defined above. Therefore, I think this PR is not needed.

== Common Toolchain Command Line Options

This section lists common RISC-V specific toolchain command line options.
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