drm: vc4: dsi: Handle the different command FIFO widths #6481
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DSI0 and DSI1 have different widths for the command FIFO (24bit vs 32bit), but the driver was assuming the 32bit width of DSI1 in all cases. DSI0 also wants the data packed as 24bit big endian, so the formatting code needs updating. Handle the difference via the variant structure. Signed-off-by: Dave Stevenson <[email protected]>
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Confirmed as working. |
popcornmix
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See: raspberrypi/linux#6502 kernel: RP1 clocks See: raspberrypi/linux#6459 kernel: dts: bcm2712-rpi: For CM5IO, i2c_csi_dsi needs to be CAM/DISP1 See: raspberrypi/linux#6495 kernel: drm: vc4: dsi: Handle the different command FIFO widths See: raspberrypi/linux#6481
popcornmix
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Dec 3, 2024
See: raspberrypi/linux#6502 kernel: RP1 clocks See: raspberrypi/linux#6459 kernel: dts: bcm2712-rpi: For CM5IO, i2c_csi_dsi needs to be CAM/DISP1 See: raspberrypi/linux#6495 kernel: drm: vc4: dsi: Handle the different command FIFO widths See: raspberrypi/linux#6481
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DSI0 and DSI1 have different widths for the command FIFO (24bit vs 32bit), but the driver was assuming the 32bit width of DSI1 in all cases.
Handle the difference via the variant structure.