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Linux serial tty driver for Raspberry Pi firmware UART #6502

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@timg236 timg236 commented Nov 29, 2024

The latest Raspberry Pi firmware (not released yet) adds support for a simple software UART on arbitrary GPIO pins. The implementation supports Pi4 family and older and requires exclusive access to the second VPU core.

Create a Linux driver for this using device-tree to configure the GPIOs

Firmware feature support

  • 4800 - 19200 bitrate (tested) but 50 - 115200 seems to have acceptable jitter
  • 1 or 2 stop bits
  • no partity
  • no support for break detection or reporting framing errors (possible future enhancement)
  • RX/TX FIFOs with a fixed size of 32-bytes - allocated in VPU accessible DMA memory by the Linux driver
  • only a single instance of the sw-uart is supported
  • requires a fixed core-clock frequency - this is automatically set to the maximum value whilst the tty is enabled

Recommended config.txt settings

dtparam=audio=off
isp_use_vpu0=1
dtoverlay=rpi-fw-uart,txd0_pin=20,rxd0_pin=21

Add VideoCore mailbox definitions for the new RPi firmware UART.

Signed-off-by: Tim Gover <[email protected]>
Assign a new serial core number for the RPi firmware UART.

Signed-off-by: Tim Gover <[email protected]>
@timg236 timg236 force-pushed the tim/rpi-fw-uart branch 2 times, most recently from 38ef634 to b72023c Compare December 2, 2024 17:08
On Raspberry Pi 4 and earlier models the firmware provides
a low speed (up to 115200 baud) bit-bashed UART on arbitrary
GPIOs using the second VPU core.

The firmware driver is designed to support 19200 baud. Higher
rates up to 115200 seem to work but there may be more jitter.

This can be useful for debug or managing additional low
speed peripherals if the hardware PL011 and 8250 hardware
UARTs are already used for console / bluetooth.

The firmware driver requires a fixed core clock frequency
and also requires the VPU PWM audio driver to be disabled
(dtparam=audio=off)

Runtime configuration is handled via the vc-mailbox APIs
with the FIFO buffers being allocated in uncached VPU
addressable memory. The FIFO pointers are stored in spare
VideoCore multi-core sync registers in order to reduce the number
of uncached SDRAM accesses thereby reducing jitter.

Signed-off-by: Tim Gover <[email protected]>
Enable the RPi firmware driver for Raspberry Pi4 and
earlier models.

Signed-off-by: Tim Gover <[email protected]>
Add a device-tree overlay to configure the GPIOs for the
Raspberry Pi firmware UART.

Example config.txt
dtoverlay=rpi-fw-uart,txd0_pin=20,rxd0_pin=21

Signed-off-by: Phil Elwell <[email protected]>
Signed-off-by: Tim Gover <[email protected]>
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