Diodes PCIe switch support #5609
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This property can be used to delay deassertion of external fundamental reset, which may be useful for endpoints that require an extended time for internal setup to complete. Signed-off-by: Jonathan Bell <[email protected]>
pelwell
reviewed
Oct 26, 2023
| tmp = readl(base + PCIE_MISC_HARD_PCIE_HARD_DEBUG); | ||
| u32p_replace_bits(&tmp, 0, PCIE_MISC_HARD_PCIE_HARD_DEBUG_PERST_ASSERT_MASK); | ||
| writel(tmp, base + PCIE_MISC_HARD_PCIE_HARD_DEBUG); | ||
| } else |
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Extra braces here, to match the if clause.
| @@ -814,6 +814,8 @@ spi10_cs_pins: &spi10_cs_gpio1 {}; | |||
| pciex1 = <&pciex1>, "status"; | |||
| pciex1_gen = <&pciex1> , "max-link-speed:0"; | |||
| pciex1_no_l0s = <&pciex1>, "aspm-no-l0s?"; | |||
| pciex1_tperst_clk_ms = <&pciex1>, "brcm,tperst-clk-ms:0"; | |||
| pcie_tperst_clk_ms = <&pciex1>, "brcm,tperst-clk-ms:0"; | |||
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We also need a line or two for each parameter in the top section of the README.
The RC has a feature that allows for manual control over the deassertion of the PERST# output pin, which allows the time between refclk active and reset deassert at the EP to be increased. Signed-off-by: Jonathan Bell <[email protected]>
The Pi 5 variant gets two parameters so that the CM4-compatible name will also work on Pi 5. Signed-off-by: Jonathan Bell <[email protected]>
RP1 supports it, but it's not a given that an arbitrary EP device on PCIE2 will. Migrate the property to the rp1_target fragment. Signed-off-by: Jonathan Bell <[email protected]>
popcornmix
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Oct 30, 2023
… the scaler See: raspberrypi/linux#5685 kernel: Diodes PCIe switch support See: raspberrypi/linux#5609
popcornmix
added a commit
to raspberrypi/rpi-firmware
that referenced
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Oct 30, 2023
… the scaler See: raspberrypi/linux#5685 kernel: Diodes PCIe switch support See: raspberrypi/linux#5609
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See #5352 - trial fix for the huge reset time needed.