#Issue 27715: Implement RegPrints Class for ARM64 SIMD Platforms #27829
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amanmogal
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praasz
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src/plugins/intel_cpu/src/emitters/plugin/aarch64/debug_capabilities.hpp
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| // Emit JIT code to print general-purpose register during runtime | ||
| gen.mov(gen.rdi, reg_value); // Move register value into rdi | ||
| gen.mov(gen.rsi, reinterpret_cast<uint64_t>(reg_name)); // Pass register name as argument | ||
| gen.call(reinterpret_cast<void(*)(const char*, uint64_t)>(print_runtime_gpr)); // Call runtime function |
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The instruction call is missed on aarch64. Please take a look at the instruction blr. It calls a subroutine at an address in a register.
The registers rdi and rsi are also missed on aarch64. This naming is used on x64 platforms.
Also, as mentioned in the issue, the perfect example for this task is the implementation of jit_power_static_emitter which generates code to call std::powf in runtime. Please take a look at this impl.
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By the way, could you please share the output of test of some Eltwise op with RegPrints using?
For example, you can launch tests for Add op: ./bin/[platform]/[build_type]/ov_cpu_func_tests --gtest_filter="*smoke*Eltwise*Add*"?
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Details:
New File: src/plugins/intel_cpu/src/emitters/plugin/aarch64/debug_capabilities.hpp
Class: RegPrints
Methods:
print_gp_registers: Prints the contents of general-purpose registers.
print_vector_registers: Prints the contents of vector registers.
usage_description: Provides a detailed explanation of how to use the RegPrints class for debugging.
Helper Methods:
print_gp_register: Helper function to print a single general-purpose register.
print_vector_register: Helper function to print a single vector register.
Functionality:
The RegPrints class includes methods to print the contents of both general-purpose and vector registers.
This enables developers to debug the state of registers during JIT kernel execution on ARM64 SIMD platforms.
The class includes a description of its usage for better understanding and implementation.
Tickets:
Issue #27715