Merge branch 'master' into issue#27715

cmake/packaging/debian.cmake

@@ -99,6 +99,7 @@ macro(ov_cpack_settings)
         2024.3.0
         2024.4.0
         2024.5.0
+        2024.6.0
         )
 
     ov_check_conflicts_versions(conflicting_versions)

cmake/packaging/rpm.cmake

@@ -87,6 +87,7 @@ macro(ov_cpack_settings)
         2024.3.0
         2024.4.0
         2024.5.0
+        2024.6.0
         )
 
     ov_check_conflicts_versions(conflicting_versions)

docs/articles_en/documentation/openvino-security.rst

@@ -55,7 +55,8 @@ Hardware-based protection such as Intel Software Guard Extensions (Intel SGX) ca
 decryption operation secrets and bind them to a device. For more information, see
 the `Intel Software Guard Extensions <https://software.intel.com/en-us/sgx>`__.
 
-Use the ``ov::Core::read_model`` to set model representations and weights respectively.
+Use the `ov::Core::read_model <../api/c_cpp_api/group__ov__dev__exec__model.html#classov_1_1_core_1ae0576a95f841c3a6f5e46e4802716981>`__
+to set model representations and weights respectively.
 
 Currently there is no way to read external weights from memory for ONNX models.
 The ``ov::Core::read_model(const std::string& model, const Tensor& weights)`` method
@@ -65,6 +66,20 @@ should be called with ``weights`` passed as an empty ``ov::Tensor``.
     :language: cpp
     :fragment: part1
 
+
+Encrypted models that have already been compiled, in the form of blob files,
+can be loaded using the
+`ov::Core::import_model <../api/c_cpp_api/group__ov__runtime__cpp__api.html#_CPPv4N2ov4Core12import_modelERNSt7istreamERKNSt6stringERK6AnyMap>`__
+method, as shown in the code sample below:
+
+.. code-block:: cpp
+
+   ov::Core core;
+   // Import a model from a blob.
+   std::ifstream compiled_blob(blob, std::ios_base::in | std::ios_base::binary);
+   auto compiled_model = core.import_model(compiled_blob, "CPU");
+
+
 Additional Resources
 ####################
 

docs/sphinx_setup/assets/versions_raw.js

@@ -1 +1 @@
-var data='[{"version": "2024"}, {"version": "2023.3"}, {"version": "2022.3"}, {"version": "nightly"}, {"version": "archives"}]';
+var data='[{"version": "2024"}, {"version": "2023.3"}, {"version": "nightly"}, {"version": "archives"}]';

src/core/include/openvino/core/except.hpp

@@ -62,6 +62,7 @@ class OPENVINO_API AssertFailure : public Exception {
                                     const char* check_string,
                                     const std::string& context_info,
                                     const std::string& explanation);
+    virtual ~AssertFailure();
 
 protected:
     explicit AssertFailure(const std::string& what_arg) : ov::Exception(what_arg) {}
@@ -71,6 +72,7 @@ class OPENVINO_API AssertFailure : public Exception {
 class OPENVINO_API NotImplemented : public AssertFailure {
 public:
     [[noreturn]] static void create(const char* file, int line, const std::string& explanation);
+    virtual ~NotImplemented();
 
     static const std::string default_msg;
 

src/core/src/except.cpp

@@ -45,8 +45,12 @@ void ov::AssertFailure::create(const char* file,
     throw ov::AssertFailure(make_what(file, line, check_string, context_info, explanation));
 }
 
+ov::AssertFailure::~AssertFailure() = default;
+
 void ov::NotImplemented::create(const char* file, int line, const std::string& explanation) {
     throw ov::NotImplemented(make_what(file, line, nullptr, default_msg, explanation));
 }
 
+ov::NotImplemented::~NotImplemented() = default;
+
 const std::string ov::NotImplemented::default_msg{"Not Implemented"};

src/frontends/pytorch/src/op_table.cpp

@@ -867,7 +867,6 @@ const std::unordered_map<std::string, CreatorFunction> get_supported_ops_fx() {
         {"aten.hardtanh.default", op::translate_hardtanh},
         {"aten.hardtanh_.default", op::inplace_op<op::translate_hardtanh>},
         {"aten.index.Tensor", op::translate_index_fx},
-        {"aten._unsafe_index.Tensor", op::translate_index_fx},
         {"aten.index_select.default", op::translate_index_select},
         {"aten.isfinite.default", op::translate_1to1_match_1_inputs<opset10::IsFinite>},
         {"aten.isinf.default", op::translate_1to1_match_1_inputs<opset10::IsInf>},

src/plugins/intel_cpu/src/cpu_streams_calculation.cpp

@@ -242,26 +242,32 @@ std::vector<std::vector<int>> get_streams_info_table(const int input_streams,
                 n_threads_per_stream = proc_type_table[0][ALL_PROC];
             }
         } else {
-            int numa_index = 1;
+            size_t socket_index = 0;
+            for (socket_index = 0; socket_index < proc_socket_table.size(); socket_index++) {
+                if (proc_socket_table[socket_index][PROC_SOCKET_ID] == current_socket_id) {
+                    break;
+                }
+            }
+            const std::vector<int>& current_socket_info = proc_socket_table[socket_index];
             n_threads_per_stream = model_prefer_threads == 0
-                                       ? proc_type_table[numa_index][ALL_PROC]
-                                       : std::min(proc_type_table[numa_index][ALL_PROC], model_prefer_threads);
+                                       ? current_socket_info[ALL_PROC]
+                                       : std::min(current_socket_info[ALL_PROC], model_prefer_threads);
             stream_info[THREADS_PER_STREAM] = n_threads_per_stream;
-            if (proc_type_table[numa_index][ALL_PROC] == proc_type_table[numa_index][MAIN_CORE_PROC]) {
+            if (current_socket_info[ALL_PROC] == current_socket_info[MAIN_CORE_PROC]) {
                 stream_info[PROC_TYPE] = MAIN_CORE_PROC;
-                update_streams_per_node(MAIN_CORE_PROC, proc_type_table[numa_index]);
-            } else if (proc_type_table[numa_index][ALL_PROC] == proc_type_table[numa_index][EFFICIENT_CORE_PROC]) {
+                update_streams_per_node(MAIN_CORE_PROC, current_socket_info);
+            } else if (current_socket_info[ALL_PROC] == current_socket_info[EFFICIENT_CORE_PROC]) {
                 stream_info[PROC_TYPE] = EFFICIENT_CORE_PROC;
-                update_streams_per_node(EFFICIENT_CORE_PROC, proc_type_table[numa_index]);
+                update_streams_per_node(EFFICIENT_CORE_PROC, current_socket_info);
             } else {
                 stream_info[PROC_TYPE] = ALL_PROC;
-                update_mix_stream_info(proc_type_table[numa_index],
-                                       {proc_type_table[numa_index]},
+                update_mix_stream_info(current_socket_info,
+                                       proc_type_table,
                                        n_threads_per_stream,
                                        IStreamsExecutor::Config::StreamsMode::SUB_STREAMS_NULL,
                                        ALL_PROC);
             }
-            update_ids_method(proc_type_table[numa_index]);
+            update_ids_method(current_socket_info);
         }
     } else {
         n_threads =

src/plugins/intel_cpu/src/emitters/plugin/aarch64/jit_eltwise_emitters.cpp

@@ -1979,6 +1979,88 @@ void jit_relu_emitter::emit_isa(const std::vector<size_t> &in_vec_idxs, const st
     h->fmaxnm(dst.s, src.s, tmp.s);
 }
 
+/// ROUND_HALF_AWAY_FROM_ZERO ///
+jit_round_half_away_from_zero_emitter::jit_round_half_away_from_zero_emitter
+                                       (dnnl::impl::cpu::aarch64::jit_generator* host,
+                                        dnnl::impl::cpu::aarch64::cpu_isa_t host_isa,
+                                        const std::shared_ptr<ov::Node>& node)
+                                        : jit_emitter(host, host_isa, node, get_arithmetic_binary_exec_precision(node)) {
+}
+
+jit_round_half_away_from_zero_emitter::jit_round_half_away_from_zero_emitter
+                                       (dnnl::impl::cpu::aarch64::jit_generator* host,
+                                        dnnl::impl::cpu::aarch64::cpu_isa_t host_isa,
+                                        const ov::element::Type exec_prc)
+                                        : jit_emitter(host, host_isa, exec_prc) {
+}
+
+size_t jit_round_half_away_from_zero_emitter::get_inputs_count() const { return 1; }
+
+std::set<std::vector<element::Type>> jit_round_half_away_from_zero_emitter::get_supported_precisions(const std::shared_ptr<ov::Node>& node) {
+    return {{element::f32}};
+}
+
+void jit_round_half_away_from_zero_emitter::emit_impl(const std::vector<size_t>& in_vec_idxs, const std::vector<size_t>& out_vec_idxs) const {
+    if (host_isa_ == dnnl::impl::cpu::aarch64::asimd) {
+        emit_isa<dnnl::impl::cpu::aarch64::asimd>(in_vec_idxs, out_vec_idxs);
+    } else {
+        OV_CPU_JIT_EMITTER_THROW("Can't create jit eltwise kernel");
+    }
+}
+
+template <dnnl::impl::cpu::aarch64::cpu_isa_t isa>
+void jit_round_half_away_from_zero_emitter::emit_isa(const std::vector<size_t> &in_vec_idxs, const std::vector<size_t> &out_vec_idxs) const {
+    OV_CPU_JIT_EMITTER_ASSERT(exec_prc_ == ov::element::f32, "unsupported precision: " + exec_prc_.to_string());
+
+    using TReg = typename dnnl::impl::cpu::aarch64::cpu_isa_traits<isa>::TReg;
+
+    TReg src = TReg(in_vec_idxs[0]);
+    TReg dst = TReg(out_vec_idxs[0]);
+
+    h->frinta(dst.s, src.s);
+}
+
+/// ROUND_HALF_TO_EVEN ///
+jit_round_half_to_even_emitter::jit_round_half_to_even_emitter
+                                (dnnl::impl::cpu::aarch64::jit_generator* host,
+                                 dnnl::impl::cpu::aarch64::cpu_isa_t host_isa,
+                                 const std::shared_ptr<ov::Node>& node)
+                                 : jit_emitter(host, host_isa, node, get_arithmetic_binary_exec_precision(node)) {
+}
+
+jit_round_half_to_even_emitter::jit_round_half_to_even_emitter
+                                (dnnl::impl::cpu::aarch64::jit_generator* host,
+                                 dnnl::impl::cpu::aarch64::cpu_isa_t host_isa,
+                                 const ov::element::Type exec_prc)
+                                 : jit_emitter(host, host_isa, exec_prc) {
+}
+
+size_t jit_round_half_to_even_emitter::get_inputs_count() const { return 1; }
+
+std::set<std::vector<element::Type>> jit_round_half_to_even_emitter::get_supported_precisions(const std::shared_ptr<ov::Node>& node) {
+    return {{element::f32}};
+}
+
+void jit_round_half_to_even_emitter::emit_impl(const std::vector<size_t>& in_vec_idxs, const std::vector<size_t>& out_vec_idxs) const {
+    if (host_isa_ == dnnl::impl::cpu::aarch64::asimd) {
+        emit_isa<dnnl::impl::cpu::aarch64::asimd>(in_vec_idxs, out_vec_idxs);
+    } else {
+        OV_CPU_JIT_EMITTER_THROW("Can't create jit eltwise kernel");
+    }
+}
+
+template <dnnl::impl::cpu::aarch64::cpu_isa_t isa>
+void jit_round_half_to_even_emitter::emit_isa(const std::vector<size_t> &in_vec_idxs, const std::vector<size_t> &out_vec_idxs) const {
+    OV_CPU_JIT_EMITTER_ASSERT(exec_prc_ == ov::element::f32, "unsupported precision: " + exec_prc_.to_string());
+
+    using TReg = typename dnnl::impl::cpu::aarch64::cpu_isa_traits<isa>::TReg;
+
+    TReg src = TReg(in_vec_idxs[0]);
+    TReg dst = TReg(out_vec_idxs[0]);
+
+    h->frintn(dst.s, src.s);
+}
+
 /// SELECT ///
 jit_select_emitter::jit_select_emitter(dnnl::impl::cpu::aarch64::jit_generator *host,
                                        dnnl::impl::cpu::aarch64::cpu_isa_t host_isa,

src/plugins/intel_cpu/src/emitters/plugin/aarch64/jit_eltwise_emitters.hpp

@@ -831,6 +831,48 @@ class jit_relu_emitter : public jit_emitter {
     void emit_isa(const std::vector<size_t> &in_vec_idxs, const std::vector<size_t> &out_vec_idxs) const;
 };
 
+class jit_round_half_away_from_zero_emitter : public jit_emitter {
+public:
+    jit_round_half_away_from_zero_emitter(dnnl::impl::cpu::aarch64::jit_generator* host,
+                                          dnnl::impl::cpu::aarch64::cpu_isa_t host_isa,
+                                          const ov::element::Type exec_prc = ov::element::f32);
+
+    jit_round_half_away_from_zero_emitter(dnnl::impl::cpu::aarch64::jit_generator* host,
+                                          dnnl::impl::cpu::aarch64::cpu_isa_t host_isa,
+                                          const std::shared_ptr<ov::Node>& node);
+
+    size_t get_inputs_count() const override;
+
+    static std::set<std::vector<element::Type>> get_supported_precisions(const std::shared_ptr<ov::Node>& node = nullptr);
+
+private:
+    void emit_impl(const std::vector<size_t> &in_vec_idxs, const std::vector<size_t> &out_vec_idxs) const override;
+
+    template <dnnl::impl::cpu::aarch64::cpu_isa_t isa>
+    void emit_isa(const std::vector<size_t> &in_vec_idxs, const std::vector<size_t> &out_vec_idxs) const;
+};
+
+class jit_round_half_to_even_emitter : public jit_emitter {
+public:
+    jit_round_half_to_even_emitter(dnnl::impl::cpu::aarch64::jit_generator* host,
+                                   dnnl::impl::cpu::aarch64::cpu_isa_t host_isa,
+                                   const ov::element::Type exec_prc = ov::element::f32);
+
+    jit_round_half_to_even_emitter(dnnl::impl::cpu::aarch64::jit_generator* host,
+                                   dnnl::impl::cpu::aarch64::cpu_isa_t host_isa,
+                                   const std::shared_ptr<ov::Node>& node);
+
+    size_t get_inputs_count() const override;
+
+    static std::set<std::vector<element::Type>> get_supported_precisions(const std::shared_ptr<ov::Node>& node = nullptr);
+
+private:
+    void emit_impl(const std::vector<size_t> &in_vec_idxs, const std::vector<size_t> &out_vec_idxs) const override;
+
+    template <dnnl::impl::cpu::aarch64::cpu_isa_t isa>
+    void emit_isa(const std::vector<size_t> &in_vec_idxs, const std::vector<size_t> &out_vec_idxs) const;
+};
+
 class jit_select_emitter : public jit_emitter {
 public:
     jit_select_emitter(dnnl::impl::cpu::aarch64::jit_generator *host,

src/plugins/intel_cpu/src/graph_context.cpp

@@ -27,6 +27,7 @@ GraphContext::GraphContext(const Config& config,
     numNumaNodes = 1;
     if (streamExecutor) {
         cpuStreamExecutor = std::dynamic_pointer_cast<ov::threading::CPUStreamsExecutor>(streamExecutor);
+        numaNodeId = cpuStreamExecutor ? cpuStreamExecutor->get_numa_node_id() : 0;
         auto nNumaNodes = get_num_numa_nodes();
         if (numNumaNodes < nNumaNodes)
             numNumaNodes = nNumaNodes;

src/plugins/intel_cpu/src/graph_context.h

@@ -44,12 +44,8 @@ class GraphContext {
         return rtParamsCache;
     }
 
-    DnnlScratchPadPtr getScratchPad(int subStreamID = 0) const {
-        if (subStreamID < 0)
-            subStreamID = 0;
-        if (subStreamID >= numNumaNodes - 1)
-            subStreamID = numNumaNodes - 1;
-        return rtScratchPads[subStreamID];
+    DnnlScratchPadPtr getScratchPad() const {
+        return rtScratchPads[numaNodeId];
     }
 
     const std::vector<DnnlScratchPadPtr>& getScratchPads() const {
@@ -101,6 +97,7 @@ class GraphContext {
     std::shared_ptr<SubMemoryManager> subMemoryManager;
 
     int numNumaNodes = 1;
+    int numaNodeId = 0;
 
     std::shared_ptr<node::MemoryStatesRegister> memoryStatesRegister;
     std::shared_ptr<NetworkMemoryControl> networkMemoryControl;

src/plugins/intel_cpu/src/node.cpp

@@ -1106,7 +1106,7 @@ void Node::toNumaNodeImpl(int numaNodeID) {
 
     // create scratch pad from specified numa node
     if (scratchpadMem) {
-        scratchpadMem = context->getScratchPad(numaNodeID)->createScratchPadMem(scratchpadMem->getDescPtr());
+        scratchpadMem = context->getScratchPad()->createScratchPadMem(scratchpadMem->getDescPtr());
         primArgs[DNNL_ARG_SCRATCHPAD] = scratchpadMem->getPrimitive();
     }
 

src/plugins/intel_cpu/src/node.h

@@ -788,7 +788,7 @@ class Node {
 
     MemoryPtr getScratchPadMem(const MemoryDescPtr& desc) {
         if (!scratchpadMem || !scratchpadMem->getDesc().isCompatible(*desc)) {
-            scratchpadMem = context->getScratchPad(curNumaNode)->createScratchPadMem(desc);
+            scratchpadMem = context->getScratchPad()->createScratchPadMem(desc);
         }
         return scratchpadMem;
     }

src/plugins/intel_cpu/src/nodes/deconv.cpp

@@ -12,7 +12,7 @@
 #include <common/primitive_desc.hpp>
 #include <common/primitive_desc_iface.hpp>
 #include "cpu/x64/cpu_isa_traits.hpp"
-#include "shape_inference/shape_inference_ngraph.hpp"
+#include "shape_inference/shape_inference.hpp"
 
 #include "eltwise.h"
 #include "fake_quantize.h"
@@ -128,12 +128,11 @@ bool DeconvKey::operator==(const DeconvKey &rhs) const {
  */
 class DeconfolutionShapeInferFactory : public ShapeInferFactory {
 public:
-    DeconfolutionShapeInferFactory(std::shared_ptr<ov::Node> op) : m_op(op) {}
+    DeconfolutionShapeInferFactory(std::shared_ptr<ov::Node> op) : m_op(std::move(op)) {}
+
     ShapeInferPtr makeShapeInfer() const override {
-        if (m_op->get_input_size() > 2) {
-            return std::make_shared<NgraphShapeInfer>(make_shape_inference(m_op), PortMask(2));
-        }
-        return std::make_shared<NgraphShapeInfer>(make_shape_inference(m_op), EMPTY_PORT_MASK);
+        const auto port_mask = (m_op->get_input_size() > 2) ? PortMask(2) : EMPTY_PORT_MASK;
+        return make_shape_inference(m_op, port_mask);
     }
 private:
     std::shared_ptr<ov::Node> m_op;

src/plugins/intel_cpu/src/nodes/executors/aarch64/jit_eltwise.cpp

@@ -49,6 +49,8 @@ bool JitEltwiseExecutor::isSupported(
                                      Algorithm::EltwisePowerStatic,
                                      Algorithm::EltwisePrelu,
                                      Algorithm::EltwiseRelu,
+                                     Algorithm::EltwiseRoundHalfAwayFromZero,
+                                     Algorithm::EltwiseRoundHalfToEven,
                                      Algorithm::EltwiseSelect,
                                      Algorithm::EltwiseSigmoid,
                                      Algorithm::EltwiseSoftSign,

src/plugins/intel_cpu/src/nodes/executors/dnnl/dnnl_fullyconnected.hpp

@@ -73,7 +73,7 @@ class DnnlFCExecutor : public Executor {
             return;
         }
         const auto newPrimMemDesc = m_primitive->scratchPadDesc();
-        m_scratchPadMemory = m_context->getScratchPad(numaNodeID)->createScratchPadMem(newPrimMemDesc);
+        m_scratchPadMemory = m_context->getScratchPad()->createScratchPadMem(newPrimMemDesc);
         m_primArgs[DNNL_ARG_SCRATCHPAD] = m_scratchPadMemory->getPrimitive();
 
         if (m_primArgs.count(DNNL_ARG_WEIGHTS)) {
@@ -139,7 +139,7 @@ class DnnlFCExecutor : public Executor {
         if (currentPrimitive && currentPrimitive->scratchPadDesc()->isCompatible(*newPrimMemDesc))
             return;
 
-        m_scratchPadMemory = m_context->getScratchPad(curNumaNode)->createScratchPadMem(newPrimMemDesc);
+        m_scratchPadMemory = m_context->getScratchPad()->createScratchPadMem(newPrimMemDesc);
         m_primArgs[DNNL_ARG_SCRATCHPAD] = m_scratchPadMemory->getPrimitive();
     }