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[CPU][ARM] JIT Floor Mod Operation #27706

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merged 8 commits into from
Nov 29, 2024
Merged

[CPU][ARM] JIT Floor Mod Operation #27706

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9a140ce
[CPU][ARM] JIT Floor Mod Operation
geeky33 Nov 22, 2024
2e2d036
Edited the required kernel files
geeky33 Nov 22, 2024
41c8cb5
Merge branch 'openvinotoolkit:master' into master
geeky33 Nov 28, 2024
94819d1
All the test cases have passed and removed the aux register
geeky33 Nov 28, 2024
c31bf84
Update jit_eltwise_emitters.cpp
geeky33 Nov 28, 2024
0624235
Update jit_eltwise_emitters.hpp
geeky33 Nov 28, 2024
2eade48
Update jit_eltwise_emitters.cpp
geeky33 Nov 28, 2024
03dce8f
Update eltwise.cpp
geeky33 Nov 28, 2024
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43 changes: 43 additions & 0 deletions src/plugins/intel_cpu/src/emitters/plugin/aarch64/jit_eltwise_emitters.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -515,7 +515,50 @@ void jit_floor_emitter::emit_isa(const std::vector<size_t> &in_vec_idxs, const s
std::set<std::vector<element::Type>> jit_floor_emitter::get_supported_precisions(const std::shared_ptr<ov::Node>& node) {
return {{element::f32}};
}
/// FLOOR_MOD ///
jit_floor_mod_emitter::jit_floor_mod_emitter(dnnl::impl::cpu::aarch64::jit_generator *host,
dnnl::impl::cpu::aarch64::cpu_isa_t host_isa,
const std::shared_ptr<ov::Node>& node)
: jit_emitter(host, host_isa, node, get_arithmetic_binary_exec_precision(node)) {
}

jit_floor_mod_emitter::jit_floor_mod_emitter(dnnl::impl::cpu::aarch64::jit_generator *host,
dnnl::impl::cpu::aarch64::cpu_isa_t host_isa,
const ov::element::Type exec_prc): jit_emitter(host, host_isa, exec_prc) {
}

size_t jit_floor_mod_emitter::get_inputs_count() const { return 2; }

size_t jit_floor_mod_emitter::get_aux_vecs_count() const { return 1; }

void jit_floor_mod_emitter::emit_impl(const std::vector<size_t> &in_vec_idxs, const std::vector<size_t> &out_vec_idxs) const {
if (host_isa_ == dnnl::impl::cpu::aarch64::asimd) {
emit_isa<dnnl::impl::cpu::aarch64::asimd>(in_vec_idxs, out_vec_idxs);
} else {
OV_CPU_JIT_EMITTER_THROW("Can't create jit eltwise kernel");
}
}

template <dnnl::impl::cpu::aarch64::cpu_isa_t isa>
void jit_floor_mod_emitter::emit_isa(const std::vector<size_t> &in_vec_idxs, const std::vector<size_t> &out_vec_idxs) const {
OV_CPU_JIT_EMITTER_ASSERT(exec_prc_ == ov::element::f32, "unsupported precision: " + exec_prc_.to_string());

using TReg = typename dnnl::impl::cpu::aarch64::cpu_isa_traits<isa>::TReg;

TReg dividend = TReg(in_vec_idxs[0]);
TReg divisor = TReg(in_vec_idxs[1]);
TReg r = TReg(out_vec_idxs[0]);
TReg aux = TReg(aux_vec_idxs[0]);

h->fdiv(aux.s, dividend.s, divisor.s);
h->frintm(aux.s, aux.s);
h->fmul(aux.s, aux.s, divisor.s);
h->fsub(r.s, dividend.s, aux.s);
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}

std::set<std::vector<element::Type>> jit_floor_mod_emitter::get_supported_precisions(const std::shared_ptr<ov::Node>& node) {
return {{element::f32, element::f32}};
}
/// CEILING ///
//Initialization of the emitter, taking node as input
jit_ceiling_emitter::jit_ceiling_emitter(dnnl::impl::cpu::aarch64::jit_generator* host,
Expand Down
21 changes: 21 additions & 0 deletions src/plugins/intel_cpu/src/emitters/plugin/aarch64/jit_eltwise_emitters.hpp
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Expand Up @@ -213,7 +213,28 @@ class jit_floor_emitter : public jit_emitter {
template <dnnl::impl::cpu::aarch64::cpu_isa_t isa>
void emit_isa(const std::vector<size_t> &in_vec_idxs, const std::vector<size_t> &out_vec_idxs) const;
};
class jit_floor_mod_emitter : public jit_emitter {
public:
jit_floor_mod_emitter(dnnl::impl::cpu::aarch64::jit_generator *host,
dnnl::impl::cpu::aarch64::cpu_isa_t host_isa,
const ov::element::Type exec_prc = ov::element::f32);

jit_floor_mod_emitter(dnnl::impl::cpu::aarch64::jit_generator *host,
dnnl::impl::cpu::aarch64::cpu_isa_t host_isa,
const std::shared_ptr<ov::Node>& node);

size_t get_inputs_count() const override;

size_t get_aux_vecs_count() const override;

static std::set<std::vector<element::Type>> get_supported_precisions(const std::shared_ptr<ov::Node>& node = nullptr);

private:
void emit_impl(const std::vector<size_t> &in_vec_idxs, const std::vector<size_t> &out_vec_idxs) const override;

template <dnnl::impl::cpu::aarch64::cpu_isa_t isa>
void emit_isa(const std::vector<size_t> &in_vec_idxs, const std::vector<size_t> &out_vec_idxs) const;
};
class jit_ceiling_emitter : public jit_emitter {
public:
// Constructor with explicit precision
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1 change: 1 addition & 0 deletions src/plugins/intel_cpu/src/nodes/executors/aarch64/jit_eltwise.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -26,6 +26,7 @@ bool JitEltwiseExecutor::isSupported(
Algorithm::EltwiseEqual,
Algorithm::EltwiseExp,
Algorithm::EltwiseFloor,
Algorithm::EltwiseFloorMod,
Algorithm::EltwiseCeiling,
Algorithm::EltwiseGeluErf,
Algorithm::EltwiseGeluTanh,
Expand Down
2 changes: 2 additions & 0 deletions src/plugins/intel_cpu/src/nodes/kernels/aarch64/jit_uni_eltwise_generic.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -648,6 +648,7 @@ std::shared_ptr<jit_emitter> jit_uni_eltwise_generic<isa>::create_eltwise_emitte
OV_CASE(Algorithm::EltwiseEqual, ov::intel_cpu::aarch64::jit_equal_emitter),
OV_CASE(Algorithm::EltwiseExp, ov::intel_cpu::aarch64::jit_exp_emitter),
OV_CASE(Algorithm::EltwiseFloor, ov::intel_cpu::aarch64::jit_floor_emitter),
OV_CASE(Algorithm::EltwiseFloorMod, ov::intel_cpu::aarch64::jit_floor_mod_emitter),
OV_CASE(Algorithm::EltwiseCeiling, ov::intel_cpu::aarch64::jit_ceiling_emitter),
OV_CASE(Algorithm::EltwiseHswish, ov::intel_cpu::aarch64::jit_hswish_emitter),
OV_CASE(Algorithm::EltwiseIsFinite, ov::intel_cpu::aarch64::jit_is_finite_emitter),
Expand Down Expand Up @@ -829,6 +830,7 @@ std::set<std::vector<element::Type>> eltwise_precision_helper::get_supported_pre
OV_CASE(Algorithm::EltwiseEqual, jit_equal_emitter),
OV_CASE(Algorithm::EltwiseExp, jit_exp_emitter),
OV_CASE(Algorithm::EltwiseFloor, jit_floor_emitter),
OV_CASE(Algorithm::EltwiseFloorMod, jit_floor_mod_emitter),
OV_CASE(Algorithm::EltwiseCeiling, jit_ceiling_emitter),
OV_CASE(Algorithm::EltwiseGeluErf, jit_gelu_erf_emitter),
OV_CASE(Algorithm::EltwiseGeluTanh, jit_gelu_tanh_emitter),
Expand Down
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