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Merge branch 'mlxsw-Various-static-checkers-fixes'
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Ido Schimmel says:

====================
mlxsw: Various static checkers fixes

Jakub told me he gets some warnings with W=1, so I decided to check with
sparse, smatch and coccinelle as well. This patch set fixes all the
issues found. None are actual bugs / regressions and therefore not
targeted at net.

Patches #1-#2 add missing kernel-doc comments.

Patch #3 removes dead code.

Patch #4 reworks the ACL code to avoid defining a static variable in a
header file.

Patch #5 removes unnecessary conversion to bool that coccinelle warns
about.

Patch #6 avoids false-positive uninitialized symbol errors emitted by
smatch.
====================

Signed-off-by: David S. Miller <[email protected]>
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@davem330
davem330 committed Mar 27, 2020
2 parents 8a8f828 + a84acf7 commit a1c7a53
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Showing 6 changed files with 109 additions and 296 deletions.
50 changes: 45 additions & 5 deletions drivers/net/ethernet/mellanox/mlxsw/core_acl_flex_keys.c
View file
Original file line number Diff line number Diff line change
Expand Up @@ -9,6 +9,41 @@
#include "item.h"
#include "core_acl_flex_keys.h"

/* For the purpose of the driver, define an internal storage scratchpad
* that will be used to store key/mask values. For each defined element type
* define an internal storage geometry.
*
* When adding new elements, MLXSW_AFK_ELEMENT_STORAGE_SIZE must be increased
* accordingly.
*/
static const struct mlxsw_afk_element_info mlxsw_afk_element_infos[] = {
MLXSW_AFK_ELEMENT_INFO_U32(SRC_SYS_PORT, 0x00, 16, 16),
MLXSW_AFK_ELEMENT_INFO_BUF(DMAC_32_47, 0x04, 2),
MLXSW_AFK_ELEMENT_INFO_BUF(DMAC_0_31, 0x06, 4),
MLXSW_AFK_ELEMENT_INFO_BUF(SMAC_32_47, 0x0A, 2),
MLXSW_AFK_ELEMENT_INFO_BUF(SMAC_0_31, 0x0C, 4),
MLXSW_AFK_ELEMENT_INFO_U32(ETHERTYPE, 0x00, 0, 16),
MLXSW_AFK_ELEMENT_INFO_U32(IP_PROTO, 0x10, 0, 8),
MLXSW_AFK_ELEMENT_INFO_U32(VID, 0x10, 8, 12),
MLXSW_AFK_ELEMENT_INFO_U32(PCP, 0x10, 20, 3),
MLXSW_AFK_ELEMENT_INFO_U32(TCP_FLAGS, 0x10, 23, 9),
MLXSW_AFK_ELEMENT_INFO_U32(DST_L4_PORT, 0x14, 0, 16),
MLXSW_AFK_ELEMENT_INFO_U32(SRC_L4_PORT, 0x14, 16, 16),
MLXSW_AFK_ELEMENT_INFO_U32(IP_TTL_, 0x18, 0, 8),
MLXSW_AFK_ELEMENT_INFO_U32(IP_ECN, 0x18, 9, 2),
MLXSW_AFK_ELEMENT_INFO_U32(IP_DSCP, 0x18, 11, 6),
MLXSW_AFK_ELEMENT_INFO_U32(VIRT_ROUTER_8_10, 0x18, 17, 3),
MLXSW_AFK_ELEMENT_INFO_U32(VIRT_ROUTER_0_7, 0x18, 20, 8),
MLXSW_AFK_ELEMENT_INFO_BUF(SRC_IP_96_127, 0x20, 4),
MLXSW_AFK_ELEMENT_INFO_BUF(SRC_IP_64_95, 0x24, 4),
MLXSW_AFK_ELEMENT_INFO_BUF(SRC_IP_32_63, 0x28, 4),
MLXSW_AFK_ELEMENT_INFO_BUF(SRC_IP_0_31, 0x2C, 4),
MLXSW_AFK_ELEMENT_INFO_BUF(DST_IP_96_127, 0x30, 4),
MLXSW_AFK_ELEMENT_INFO_BUF(DST_IP_64_95, 0x34, 4),
MLXSW_AFK_ELEMENT_INFO_BUF(DST_IP_32_63, 0x38, 4),
MLXSW_AFK_ELEMENT_INFO_BUF(DST_IP_0_31, 0x3C, 4),
};

struct mlxsw_afk {
struct list_head key_info_list;
unsigned int max_blocks;
Expand All @@ -26,13 +61,15 @@ static bool mlxsw_afk_blocks_check(struct mlxsw_afk *mlxsw_afk)
const struct mlxsw_afk_block *block = &mlxsw_afk->blocks[i];

for (j = 0; j < block->instances_count; j++) {
const struct mlxsw_afk_element_info *elinfo;
struct mlxsw_afk_element_inst *elinst;

elinst = &block->instances[j];
if (elinst->type != elinst->info->type ||
elinfo = &mlxsw_afk_element_infos[elinst->element];
if (elinst->type != elinfo->type ||
(!elinst->avoid_size_check &&
elinst->item.size.bits !=
elinst->info->item.size.bits))
elinfo->item.size.bits))
return false;
}
}
Expand Down Expand Up @@ -116,7 +153,7 @@ static void mlxsw_afk_picker_count_hits(struct mlxsw_afk *mlxsw_afk,
struct mlxsw_afk_element_inst *elinst;

elinst = &block->instances[j];
if (elinst->info->element == element) {
if (elinst->element == element) {
__set_bit(element, picker->hits[i].element);
picker->hits[i].total++;
}
Expand Down Expand Up @@ -301,7 +338,7 @@ mlxsw_afk_block_elinst_get(const struct mlxsw_afk_block *block,
struct mlxsw_afk_element_inst *elinst;

elinst = &block->instances[i];
if (elinst->info->element == element)
if (elinst->element == element)
return elinst;
}
return NULL;
Expand Down Expand Up @@ -409,9 +446,12 @@ static void
mlxsw_sp_afk_encode_one(const struct mlxsw_afk_element_inst *elinst,
char *output, char *storage, int u32_diff)
{
const struct mlxsw_item *storage_item = &elinst->info->item;
const struct mlxsw_item *output_item = &elinst->item;
const struct mlxsw_afk_element_info *elinfo;
const struct mlxsw_item *storage_item;

elinfo = &mlxsw_afk_element_infos[elinst->element];
storage_item = &elinfo->item;
if (elinst->type == MLXSW_AFK_ELEMENT_TYPE_U32)
mlxsw_sp_afk_encode_u32(storage_item, output_item,
storage, output, u32_diff);
Expand Down
36 changes: 2 additions & 34 deletions drivers/net/ethernet/mellanox/mlxsw/core_acl_flex_keys.h
View file
Original file line number Diff line number Diff line change
Expand Up @@ -69,42 +69,10 @@ struct mlxsw_afk_element_info {
MLXSW_AFK_ELEMENT_INFO(MLXSW_AFK_ELEMENT_TYPE_BUF, \
_element, _offset, 0, _size)

/* For the purpose of the driver, define an internal storage scratchpad
* that will be used to store key/mask values. For each defined element type
* define an internal storage geometry.
*/
static const struct mlxsw_afk_element_info mlxsw_afk_element_infos[] = {
MLXSW_AFK_ELEMENT_INFO_U32(SRC_SYS_PORT, 0x00, 16, 16),
MLXSW_AFK_ELEMENT_INFO_BUF(DMAC_32_47, 0x04, 2),
MLXSW_AFK_ELEMENT_INFO_BUF(DMAC_0_31, 0x06, 4),
MLXSW_AFK_ELEMENT_INFO_BUF(SMAC_32_47, 0x0A, 2),
MLXSW_AFK_ELEMENT_INFO_BUF(SMAC_0_31, 0x0C, 4),
MLXSW_AFK_ELEMENT_INFO_U32(ETHERTYPE, 0x00, 0, 16),
MLXSW_AFK_ELEMENT_INFO_U32(IP_PROTO, 0x10, 0, 8),
MLXSW_AFK_ELEMENT_INFO_U32(VID, 0x10, 8, 12),
MLXSW_AFK_ELEMENT_INFO_U32(PCP, 0x10, 20, 3),
MLXSW_AFK_ELEMENT_INFO_U32(TCP_FLAGS, 0x10, 23, 9),
MLXSW_AFK_ELEMENT_INFO_U32(DST_L4_PORT, 0x14, 0, 16),
MLXSW_AFK_ELEMENT_INFO_U32(SRC_L4_PORT, 0x14, 16, 16),
MLXSW_AFK_ELEMENT_INFO_U32(IP_TTL_, 0x18, 0, 8),
MLXSW_AFK_ELEMENT_INFO_U32(IP_ECN, 0x18, 9, 2),
MLXSW_AFK_ELEMENT_INFO_U32(IP_DSCP, 0x18, 11, 6),
MLXSW_AFK_ELEMENT_INFO_U32(VIRT_ROUTER_8_10, 0x18, 17, 3),
MLXSW_AFK_ELEMENT_INFO_U32(VIRT_ROUTER_0_7, 0x18, 20, 8),
MLXSW_AFK_ELEMENT_INFO_BUF(SRC_IP_96_127, 0x20, 4),
MLXSW_AFK_ELEMENT_INFO_BUF(SRC_IP_64_95, 0x24, 4),
MLXSW_AFK_ELEMENT_INFO_BUF(SRC_IP_32_63, 0x28, 4),
MLXSW_AFK_ELEMENT_INFO_BUF(SRC_IP_0_31, 0x2C, 4),
MLXSW_AFK_ELEMENT_INFO_BUF(DST_IP_96_127, 0x30, 4),
MLXSW_AFK_ELEMENT_INFO_BUF(DST_IP_64_95, 0x34, 4),
MLXSW_AFK_ELEMENT_INFO_BUF(DST_IP_32_63, 0x38, 4),
MLXSW_AFK_ELEMENT_INFO_BUF(DST_IP_0_31, 0x3C, 4),
};

#define MLXSW_AFK_ELEMENT_STORAGE_SIZE 0x40

struct mlxsw_afk_element_inst { /* element instance in actual block */
const struct mlxsw_afk_element_info *info;
enum mlxsw_afk_element element;
enum mlxsw_afk_element_type type;
struct mlxsw_item item; /* element geometry in block */
int u32_key_diff; /* in case value needs to be adjusted before write
Expand All @@ -116,7 +84,7 @@ struct mlxsw_afk_element_inst { /* element instance in actual block */
#define MLXSW_AFK_ELEMENT_INST(_type, _element, _offset, \
_shift, _size, _u32_key_diff, _avoid_size_check) \
{ \
.info = &mlxsw_afk_element_infos[MLXSW_AFK_ELEMENT_##_element], \
.element = MLXSW_AFK_ELEMENT_##_element, \
.type = _type, \
.item = { \
.offset = _offset, \
Expand Down
1 change: 1 addition & 0 deletions drivers/net/ethernet/mellanox/mlxsw/i2c.c
View file
Original file line number Diff line number Diff line change
Expand Up @@ -53,6 +53,7 @@

/**
* struct mlxsw_i2c - device private data:
* @cmd: command attributes;
* @cmd.mb_size_in: input mailbox size;
* @cmd.mb_off_in: input mailbox offset in register space;
* @cmd.mb_size_out: output mailbox size;
Expand Down
152 changes: 8 additions & 144 deletions drivers/net/ethernet/mellanox/mlxsw/spectrum_fid.c
View file
Original file line number Diff line number Diff line change
Expand Up @@ -438,16 +438,6 @@ static int mlxsw_sp_fid_vni_op(struct mlxsw_sp *mlxsw_sp, u16 fid_index,
return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfmr), sfmr_pl);
}

static int mlxsw_sp_fid_vid_map(struct mlxsw_sp *mlxsw_sp, u16 fid_index,
u16 vid, bool valid)
{
enum mlxsw_reg_svfa_mt mt = MLXSW_REG_SVFA_MT_VID_TO_FID;
char svfa_pl[MLXSW_REG_SVFA_LEN];

mlxsw_reg_svfa_pack(svfa_pl, 0, mt, valid, fid_index, vid);
return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(svfa), svfa_pl);
}

static int __mlxsw_sp_fid_port_vid_map(struct mlxsw_sp *mlxsw_sp, u16 fid_index,
u8 local_port, u16 vid, bool valid)
{
Expand All @@ -458,140 +448,6 @@ static int __mlxsw_sp_fid_port_vid_map(struct mlxsw_sp *mlxsw_sp, u16 fid_index,
return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(svfa), svfa_pl);
}

static int mlxsw_sp_fid_8021q_configure(struct mlxsw_sp_fid *fid)
{
struct mlxsw_sp *mlxsw_sp = fid->fid_family->mlxsw_sp;
struct mlxsw_sp_fid_8021q *fid_8021q;
int err;

err = mlxsw_sp_fid_op(mlxsw_sp, fid->fid_index, fid->fid_index, true);
if (err)
return err;

fid_8021q = mlxsw_sp_fid_8021q_fid(fid);
err = mlxsw_sp_fid_vid_map(mlxsw_sp, fid->fid_index, fid_8021q->vid,
true);
if (err)
goto err_fid_map;

return 0;

err_fid_map:
mlxsw_sp_fid_op(mlxsw_sp, fid->fid_index, 0, false);
return err;
}

static void mlxsw_sp_fid_8021q_deconfigure(struct mlxsw_sp_fid *fid)
{
struct mlxsw_sp *mlxsw_sp = fid->fid_family->mlxsw_sp;
struct mlxsw_sp_fid_8021q *fid_8021q;

fid_8021q = mlxsw_sp_fid_8021q_fid(fid);
mlxsw_sp_fid_vid_map(mlxsw_sp, fid->fid_index, fid_8021q->vid, false);
mlxsw_sp_fid_op(mlxsw_sp, fid->fid_index, 0, false);
}

static int mlxsw_sp_fid_8021q_index_alloc(struct mlxsw_sp_fid *fid,
const void *arg, u16 *p_fid_index)
{
struct mlxsw_sp_fid_family *fid_family = fid->fid_family;
u16 vid = *(u16 *) arg;

/* Use 1:1 mapping for simplicity although not a must */
if (vid < fid_family->start_index || vid > fid_family->end_index)
return -EINVAL;
*p_fid_index = vid;

return 0;
}

static bool
mlxsw_sp_fid_8021q_compare(const struct mlxsw_sp_fid *fid, const void *arg)
{
u16 vid = *(u16 *) arg;

return mlxsw_sp_fid_8021q_fid(fid)->vid == vid;
}

static u16 mlxsw_sp_fid_8021q_flood_index(const struct mlxsw_sp_fid *fid)
{
return fid->fid_index;
}

static int mlxsw_sp_fid_8021q_port_vid_map(struct mlxsw_sp_fid *fid,
struct mlxsw_sp_port *mlxsw_sp_port,
u16 vid)
{
struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
u8 local_port = mlxsw_sp_port->local_port;

/* In case there are no {Port, VID} => FID mappings on the port,
* we can use the global VID => FID mapping we created when the
* FID was configured.
*/
if (mlxsw_sp->fid_core->port_fid_mappings[local_port] == 0)
return 0;
return __mlxsw_sp_fid_port_vid_map(mlxsw_sp, fid->fid_index, local_port,
vid, true);
}

static void
mlxsw_sp_fid_8021q_port_vid_unmap(struct mlxsw_sp_fid *fid,
struct mlxsw_sp_port *mlxsw_sp_port, u16 vid)
{
struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
u8 local_port = mlxsw_sp_port->local_port;

if (mlxsw_sp->fid_core->port_fid_mappings[local_port] == 0)
return;
__mlxsw_sp_fid_port_vid_map(mlxsw_sp, fid->fid_index, local_port, vid,
false);
}

static const struct mlxsw_sp_fid_ops mlxsw_sp_fid_8021q_ops = {
.setup = mlxsw_sp_fid_8021q_setup,
.configure = mlxsw_sp_fid_8021q_configure,
.deconfigure = mlxsw_sp_fid_8021q_deconfigure,
.index_alloc = mlxsw_sp_fid_8021q_index_alloc,
.compare = mlxsw_sp_fid_8021q_compare,
.flood_index = mlxsw_sp_fid_8021q_flood_index,
.port_vid_map = mlxsw_sp_fid_8021q_port_vid_map,
.port_vid_unmap = mlxsw_sp_fid_8021q_port_vid_unmap,
};

static const struct mlxsw_sp_flood_table mlxsw_sp_fid_8021q_flood_tables[] = {
{
.packet_type = MLXSW_SP_FLOOD_TYPE_UC,
.bridge_type = MLXSW_REG_SFGC_BRIDGE_TYPE_1Q_FID,
.table_type = MLXSW_REG_SFGC_TABLE_TYPE_FID_OFFSET,
.table_index = 0,
},
{
.packet_type = MLXSW_SP_FLOOD_TYPE_MC,
.bridge_type = MLXSW_REG_SFGC_BRIDGE_TYPE_1Q_FID,
.table_type = MLXSW_REG_SFGC_TABLE_TYPE_FID_OFFSET,
.table_index = 1,
},
{
.packet_type = MLXSW_SP_FLOOD_TYPE_BC,
.bridge_type = MLXSW_REG_SFGC_BRIDGE_TYPE_1Q_FID,
.table_type = MLXSW_REG_SFGC_TABLE_TYPE_FID_OFFSET,
.table_index = 2,
},
};

/* Range and flood configuration must match mlxsw_config_profile */
static const struct mlxsw_sp_fid_family mlxsw_sp_fid_8021q_family = {
.type = MLXSW_SP_FID_TYPE_8021Q,
.fid_size = sizeof(struct mlxsw_sp_fid_8021q),
.start_index = 1,
.end_index = VLAN_VID_MASK,
.flood_tables = mlxsw_sp_fid_8021q_flood_tables,
.nr_flood_tables = ARRAY_SIZE(mlxsw_sp_fid_8021q_flood_tables),
.rif_type = MLXSW_SP_RIF_TYPE_VLAN,
.ops = &mlxsw_sp_fid_8021q_ops,
};

static struct mlxsw_sp_fid_8021d *
mlxsw_sp_fid_8021d_fid(const struct mlxsw_sp_fid *fid)
{
Expand Down Expand Up @@ -846,6 +702,14 @@ static const struct mlxsw_sp_fid_family mlxsw_sp_fid_8021d_family = {
.lag_vid_valid = 1,
};

static bool
mlxsw_sp_fid_8021q_compare(const struct mlxsw_sp_fid *fid, const void *arg)
{
u16 vid = *(u16 *) arg;

return mlxsw_sp_fid_8021q_fid(fid)->vid == vid;
}

static void
mlxsw_sp_fid_8021q_fdb_clear_offload(const struct mlxsw_sp_fid *fid,
const struct net_device *nve_dev)
Expand Down
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