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Context
This PR adds support for ARM by querying the system counter via the cntvct_el0 register. This is the spiritual equivalent of querying the TSC on x86_64 via
rdtsc
.Notes
Currently, this PR just adds support for the "counter" implementation, as mentioned above. In practice, 64-bit ARM systems (AArch64, which was introduced with the ARMv8 architecture) did not have a fixed frequency for the system counter until ARMv8.6-A, and had an implementation-defined frequency of anywhere from 1MHz to 50MHz. This is naturally at odds with striving for nanosecond precision.
As it stands, we simply utilize the normal calibration loop. In the future, once we have access to a system with a recent enough ARM processor, we can add fast path support for using the known system counter frequency and optimizing our reference-to-counter timebase conversion logic. This is also in line with the desire to utilize known TSC frequency information for Intel CPUs to avoid the expensive/jitter-y calibration procedure.