Adding support for TSC on ARM.

[tobz]

A user recently asked if quanta has ARM support for TSC and what it would take to add support. It felt like a good time to add an issue and potentially revisit what it would take.

At a high level, ARM doesn't have exactly the same instruction for reading it directly, but it has a similar instruction -- mrs -- which can read.. coprocessor registers? And apparently there's a coprocessor register for a counter that works in the same way as the TSC does in x86: cntvct_el0. Additionally, there's also another coprocessor register that apparently holds the true TSC frequency: cntfrq_el0.

Additionally, I had mistakenly thought this was only doable when the process had access to run privileged instructions a la reading certain Intel performance MSRs requiring root on Linux. Turns out that this is not the case.

The major thing we're lacking at the moment is a stable way to run the mrs instruction on ARM. There's no intrinsic for it in core::arch, and even the existing ARM intrinsics are themselves all still unstable. Likewise, asm! for writing assembly directly is also still unstable.

Once either of those approaches becomes stable, we can investigate doing an initial attempt to support a TSC-like mode on ARM.

Rust asm! tracking issue: rust-lang/rust#72016

[tobz]

Actually, per rust-lang/rust#91728, looks like the stabilization PR for asm! was merged in, and should theoretically be released in 1.59.0. 🎉

[tobz]

I have a test branch -- tobz/add-arm-support -- that provides functioning ARM support.

Biggest bummer is that for AArch64 (the architecture we target), the granularity of the underlying counter is implementation defined until a specific subversion of the architecture (ARMv8.6-A). This means time keeping will generally be limited to an accuracy of somewhere around 10-20ns, based on common system counter frequencies for production ARM processors between ARMv8.1 and 8.5.

Luckily, at least, ARMv8.6-A and beyond require a fixed 1GHz system counter frequency such that the system counter can fastpath the conversion to the reference timebase. We have rudimentary support (more can be optimized) for that in the branch but I still need to find a free cloud VM/instance/something to actually test it on.

[tobz]

This is addressed by #91. Still need to cut a release, though.

[tobz]

Released as [email protected].

I've called it experimental in the changelog because I simply don't have an ARM machine to really beat it up on, but all preliminary testing (including on an actual ARM machine) worked and passed tests, so it should be good.