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[i2c] Interrupt type alignment and FIFO watermark changes #21621
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Modify existing FIFO Threshold interrupts to Status type. Signed-off-by: Adrian Lees <[email protected]>
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Thanks for making these changes. Most of the changes are autogenerated, which I did not review closely. I spent most of my time on commit 596ba7b and left a few questions. From what I can tell this PR does what it says it does.
@@ -463,10 +466,11 @@ class i2c_base_vseq extends cip_base_vseq #( | |||
foreach (intr_clear[i]) { | |||
intr_state[i] -> intr_clear[i] == 1; | |||
}) | |||
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// TODO: It is NOT possible to clear this interrupt by a simple INTR_STATE write now! |
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Does this cause any extra failures?
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We have a couple of block level DV issues still unresolved; it's a warning to readers whilst things are still in flux.
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I2C is a focus block for M2, so as long as V1 tests continue to pass, failures in V2 tests can be waived for the moment to allow us to hit the M2 deadline. Should we take that option (and add an issue to track fixing of the waived tests)?
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@@ -463,10 +466,11 @@ class i2c_base_vseq extends cip_base_vseq #( | |||
foreach (intr_clear[i]) { | |||
intr_state[i] -> intr_clear[i] == 1; | |||
}) | |||
|
|||
// TODO: It is NOT possible to clear this interrupt by a simple INTR_STATE write now! |
There was a problem hiding this comment.
Choose a reason for hiding this comment
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I2C is a focus block for M2, so as long as V1 tests continue to pass, failures in V2 tests can be waived for the moment to allow us to hit the M2 deadline. Should we take that option (and add an issue to track fixing of the waived tests)?
Change FIFO level configuration to reflect the introduction of thresholds for ACQ and TX FIFOs. Separate FIFO level status into host- and target-side registers in anticipation of deeper FIFOs. Fmt/Tx overflow interrupts and testing no longer required. Re-purpose fmt/tx_overflow interrupts as 'tx_threshold' and 'acq_threshold' interrupts for target mode. Replace threshold encoding with a simple, more flexible entry count, supporting FIFO depths of more than 32 bytes. i2c_target_smoke_vseq anticipates FmtThreshold IRQ assertion because that host-side FIFO is unused and remains empty. Minimal changes to i2c_host_fifo_watermark_vseq to maintain operation. Signed-off-by: Adrian Lees <[email protected]>
Signed-off-by: Adrian Lees <[email protected]>
Modify the DIF interface and tests that use it to accommodate the FIFO watermarks and levels. Signed-off-by: Adrian Lees <[email protected]>
Introduce local clearing of Status type interrupts as a temporary measure to avoid adversely impacting pass rates; this change should be in cip_base_vseq in time. Signed-off-by: Adrian Lees <[email protected]>
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Issue 21755 created to track DV tests broken or made less reliable by this PR or others. |
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LGTM, thanks for implementing my feedback 👍
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Thanks for addressing my comments. Let's wait for CI to finish running before merging.
The failure of the CW310 SiVal non-ROM_EXT Tests CI check is most likely unrelated to this PR; see this discussion. |
I just re-ran the 4 chip-level I2C-related tests locally for some extra confidence. |
Also |
This PR combines two interconnected changes:
In response to #16444, the
fmt_overflow
andtx_overflow
interrupts are dropped because they are not useful. They are replaced with the two new 'threshold' interrupts.At the same time as extending the interrupt/threshold logic to include the Target mode FIFOs, the programmed threshold values and level status indicators are extended to accommodate the 64-byte FIFOs of the current design and - in anticipation of future deployments - extends support to 256-byte FIFO depths.
The DV sequences are updated to avoid heavily impacting the pass rates, but some further work is required on the DV front, not least to exercise the new functionality.