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153 changes: 153 additions & 0 deletions
153
teeio-validator/library/cxl_ide_test_lib/test_case/test_case_keyrefresh.c
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|---|---|---|
| @@ -0,0 +1,153 @@ | ||
| /** | ||
| * Copyright Notice: | ||
| * Copyright 2023-2024 Intel. All rights reserved. | ||
| * License: BSD 3-Clause License. | ||
| **/ | ||
|
|
||
| #include <stdlib.h> | ||
| #include <stdio.h> | ||
| #include <ctype.h> | ||
|
|
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| #include "assert.h" | ||
| #include "hal/base.h" | ||
| #include "hal/library/debuglib.h" | ||
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| #include "hal/library/memlib.h" | ||
| #include "library/spdm_requester_lib.h" | ||
| #include "library/cxl_ide_km_requester_lib.h" | ||
| #include "ide_test.h" | ||
| #include "helperlib.h" | ||
| #include "teeio_debug.h" | ||
| #include "cxl_ide_lib.h" | ||
| #include "cxl_ide_test_common.h" | ||
|
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| // setup cxl ide stream | ||
| bool cxl_setup_ide_stream(void *doe_context, void *spdm_context, | ||
| uint32_t *session_id, uint8_t *kcbar_addr, | ||
| uint8_t stream_id, uint8_t port_index, | ||
| ide_common_test_port_context_t *upper_port, | ||
| ide_common_test_port_context_t *lower_port, | ||
| bool skip_ksetgo, uint32_t config_bitmap, | ||
| bool set_link_enc_enable); | ||
| // stop cxl ide stream | ||
| bool cxl_stop_ide_stream(void *doe_context, void *spdm_context, | ||
| uint32_t *session_id, uint8_t *kcbar_addr, | ||
| uint8_t stream_id, | ||
| uint8_t port_index, | ||
| ide_common_test_port_context_t *upper_port, | ||
| ide_common_test_port_context_t *lower_port); | ||
|
|
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| bool cxl_ide_test_keyrefresh_setup(void *test_context) | ||
| { | ||
| ide_common_test_case_context_t *case_context = (ide_common_test_case_context_t *)test_context; | ||
| TEEIO_ASSERT(case_context); | ||
| TEEIO_ASSERT(case_context->signature == CASE_CONTEXT_SIGNATURE); | ||
|
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| cxl_ide_test_group_context_t *group_context = (cxl_ide_test_group_context_t *)case_context->group_context; | ||
| TEEIO_ASSERT(group_context); | ||
| TEEIO_ASSERT(group_context->signature == GROUP_CONTEXT_SIGNATURE); | ||
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| ide_common_test_port_context_t* upper_port = &group_context->upper_port; | ||
| ide_common_test_port_context_t* lower_port = &group_context->lower_port; | ||
|
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| // An ide_stream is first setup so that key_refresh can be tested in run. | ||
| IDE_TEST_CONFIGURATION *configuration = get_configuration_by_id(group_context->suite_context->test_config, group_context->config_id); | ||
| TEEIO_ASSERT(configuration); | ||
|
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| return cxl_setup_ide_stream(group_context->doe_context, group_context->spdm_context, | ||
| &group_context->session_id, upper_port->mapped_kcbar_addr, | ||
| group_context->stream_id, 0, | ||
| upper_port, lower_port, false, configuration->bit_map, true); | ||
| } | ||
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| bool cxl_ide_test_keyrefresh_run(void *test_context) | ||
| { | ||
| ide_common_test_case_context_t *case_context = (ide_common_test_case_context_t *)test_context; | ||
| TEEIO_ASSERT(case_context); | ||
| TEEIO_ASSERT(case_context->signature == CASE_CONTEXT_SIGNATURE); | ||
|
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| cxl_ide_test_group_context_t *group_context = (cxl_ide_test_group_context_t *)case_context->group_context; | ||
| TEEIO_ASSERT(group_context); | ||
| TEEIO_ASSERT(group_context->signature == GROUP_CONTEXT_SIGNATURE); | ||
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| ide_common_test_port_context_t* upper_port = &group_context->upper_port; | ||
| ide_common_test_port_context_t* lower_port = &group_context->lower_port; | ||
| INTEL_KEYP_CXL_ROOT_COMPLEX_KCBAR *kcbar_ptr = (INTEL_KEYP_CXL_ROOT_COMPLEX_KCBAR *)upper_port->mapped_kcbar_addr; | ||
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| IDE_TEST_CONFIGURATION *configuration = get_configuration_by_id(group_context->suite_context->test_config, group_context->config_id); | ||
| TEEIO_ASSERT(configuration); | ||
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| int cmd = 0; | ||
| bool res = true; | ||
|
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| while(true){ | ||
| TEEIO_PRINT(("\n")); | ||
| TEEIO_PRINT(("Print host registers.\n")); | ||
| cxl_dump_kcbar(kcbar_ptr); | ||
| // dump CXL IDE Capability in memcache reg block | ||
| cxl_dump_ide_status(upper_port->cxl_data.memcache.cap_headers, upper_port->cxl_data.memcache.cap_headers_cnt, upper_port->cxl_data.memcache.mapped_memcache_reg_block); | ||
|
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| TEEIO_PRINT(("\n")); | ||
| TEEIO_PRINT(("Print device registers.\n")); | ||
| // dump CXL IDE Capability in memcache reg block | ||
| cxl_dump_ide_status(lower_port->cxl_data.memcache.cap_headers, lower_port->cxl_data.memcache.cap_headers_cnt, lower_port->cxl_data.memcache.mapped_memcache_reg_block); | ||
|
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| TEEIO_PRINT(("Press 'q' to quit test or any other keys to key_refresh.\n")); | ||
| cmd = getchar(); | ||
| if(cmd == 'q' || cmd == 'Q') { | ||
| break; | ||
| } else { | ||
| res = cxl_setup_ide_stream(group_context->doe_context, group_context->spdm_context, | ||
| &group_context->session_id, upper_port->mapped_kcbar_addr, | ||
| group_context->stream_id, 0, | ||
| upper_port, lower_port, false, configuration->bit_map, false); | ||
|
|
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| if(!res) { | ||
| break; | ||
| } | ||
| } | ||
| } | ||
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| case_context->result = res ? IDE_COMMON_TEST_CASE_RESULT_SUCCESS : IDE_COMMON_TEST_CASE_RESULT_FAILED; | ||
|
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| return res; | ||
| } | ||
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| bool cxl_ide_test_keyrefresh_teardown(void *test_context) | ||
| { | ||
| bool ret = false; | ||
|
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| ide_common_test_case_context_t *case_context = (ide_common_test_case_context_t *)test_context; | ||
| TEEIO_ASSERT(case_context); | ||
| TEEIO_ASSERT(case_context->signature == CASE_CONTEXT_SIGNATURE); | ||
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| cxl_ide_test_group_context_t *group_context = case_context->group_context; | ||
| TEEIO_ASSERT(group_context); | ||
| TEEIO_ASSERT(group_context->signature == GROUP_CONTEXT_SIGNATURE); | ||
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| ide_common_test_port_context_t *upper_port = &group_context->upper_port; | ||
| ide_common_test_port_context_t *lower_port = &group_context->lower_port; | ||
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| CXL_QUERY_RESP_CAPS dev_caps = {.raw = lower_port->cxl_data.query_resp.caps}; | ||
| TEEIO_DEBUG((TEEIO_DEBUG_INFO, "dev_caps.k_set_stop_capable = %d\n", dev_caps.k_set_stop_capable)); | ||
|
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| // send KSetStop if supported. | ||
| if(dev_caps.k_set_stop_capable == 1) { | ||
| ret = cxl_stop_ide_stream(group_context->doe_context, group_context->spdm_context, | ||
| &group_context->session_id, upper_port->mapped_kcbar_addr, | ||
| group_context->stream_id, 0, | ||
| upper_port, lower_port); | ||
| if(!ret) { | ||
| TEEIO_DEBUG((TEEIO_DEBUG_ERROR, "cxl_stop_ide_stream failed.\n")); | ||
| return false; | ||
| } | ||
| } else { | ||
| TEEIO_DEBUG((TEEIO_DEBUG_INFO, "KSetStop is not supported.\n")); | ||
| } | ||
|
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| // clear LinkEncEnable on the RootPort side | ||
| INTEL_KEYP_CXL_ROOT_COMPLEX_KCBAR *kcbar_ptr = (INTEL_KEYP_CXL_ROOT_COMPLEX_KCBAR *)upper_port->mapped_kcbar_addr; | ||
| cxl_cfg_rp_linkenc_enable(kcbar_ptr, false); | ||
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| return true; | ||
| } |