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Merge pull request #12 from NorwegianRockCat/increase-delay-in-firmwa…
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…re-load

Get Navi10 card working on FreeBSD
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evadot authored Jul 5, 2020
2 parents efc692b + 81ecd36 commit 27978ec
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Showing 2 changed files with 16 additions and 1 deletion.
4 changes: 4 additions & 0 deletions drivers/gpu/drm/amd/amdgpu/psp_v11_0.c
Original file line number Diff line number Diff line change
Expand Up @@ -299,7 +299,11 @@ static int psp_v11_0_bootloader_load_sos(struct psp_context *psp)
psp_gfxdrv_command_reg);

/* there might be handshake issue with hardware which needs delay */
#ifdef __linux__
mdelay(20);
#elif defined(__FreeBSD__)
mdelay(30);
#endif
ret = psp_wait_for(psp, SOC15_REG_OFFSET(MP0, 0, mmMP0_SMN_C2PMSG_81),
RREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_81),
0, true);
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13 changes: 12 additions & 1 deletion drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c
Original file line number Diff line number Diff line change
Expand Up @@ -2035,6 +2035,9 @@ bool dcn20_validate_bandwidth(struct dc *dc, struct dc_state *context,
if (!pipes)
return false;

#ifdef __FreeBSD__
kernel_fpu_begin();
#endif
for (i = 0; i < dc->res_pool->pipe_count; i++) {
struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i];
struct pipe_ctx *hsplit_pipe = pipe->bottom_pipe;
Expand Down Expand Up @@ -2397,6 +2400,9 @@ bool dcn20_validate_bandwidth(struct dc *dc, struct dc_state *context,
out = false;

validate_out:
#ifdef __FreeBSD__
kernel_fpu_end();
#endif
kfree(pipes);

BW_VAL_TRACE_FINISH();
Expand Down Expand Up @@ -3017,6 +3023,9 @@ static bool construct(

ranges.num_reader_wm_sets = 1;
} else if (dcn2_0_soc.num_states > 1) {
#ifdef __FreeBSD__
kernel_fpu_begin();
#endif
for (i = 0; i < 4 && i < dcn2_0_soc.num_states; i++) {
ranges.reader_wm_sets[i].wm_inst = i;
ranges.reader_wm_sets[i].min_drain_clk_mhz = PP_SMU_WM_SET_RANGE_CLK_UNCONSTRAINED_MIN;
Expand All @@ -3026,7 +3035,9 @@ static bool construct(

ranges.num_reader_wm_sets = i + 1;
}

#ifdef __FreeBSD__
kernel_fpu_end();
#endif
ranges.reader_wm_sets[0].min_fill_clk_mhz = PP_SMU_WM_SET_RANGE_CLK_UNCONSTRAINED_MIN;
ranges.reader_wm_sets[ranges.num_reader_wm_sets - 1].max_fill_clk_mhz = PP_SMU_WM_SET_RANGE_CLK_UNCONSTRAINED_MAX;
}
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