esp_system: Fix a race-condition in esp_ipc_isr (in QEMU env)

The race condition is very unlikely on real hardware but can be observed with qemu under heavy load. Also add missing `memw` instructions which are generated by the C compiler but absent in the assembly code. Signed-off-by: Paul Guyot <[email protected]> Signed-off-by: KonstantinKondrashov <[email protected]> Merges #11447 Closes #11433
espressif · May 24, 2023 · ceb121f · ceb121f
1 parent a8a2b08
commit ceb121f
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diff --git a/components/esp_system/port/arch/xtensa/esp_ipc_isr.c b/components/esp_system/port/arch/xtensa/esp_ipc_isr.c
@@ -142,6 +142,8 @@ void IRAM_ATTR esp_ipc_isr_release_other_cpu(void)
         const uint32_t cpu_id = xPortGetCoreID();
         if (--s_count_of_nested_calls[cpu_id] == 0) {
             esp_ipc_isr_finish_cmd = 1;
+            // Make sure end flag is cleared and esp_ipc_isr_waiting_for_finish_cmd is done.
+            while (!esp_ipc_isr_end_fl) {};
             IPC_ISR_EXIT_CRITICAL();
 #if CONFIG_FREERTOS_SMP
             portRESTORE_INTERRUPTS(s_stored_interrupt_level);

diff --git a/components/esp_system/port/arch/xtensa/esp_ipc_isr_handler.S b/components/esp_system/port/arch/xtensa/esp_ipc_isr_handler.S
@@ -96,6 +96,7 @@ esp_ipc_isr_handler:
 
     /* set the start flag */
     movi    a0, esp_ipc_isr_start_fl
+    memw
     s32i    a0, a0, 0
 
     /* Call the esp_ipc_function(void* arg) */
@@ -113,6 +114,7 @@ esp_ipc_isr_handler:
 
     /* set the end flag */
     movi    a0, esp_ipc_isr_end_fl
+    memw
     s32i    a0, a0, 0
 
     /* restore a0 */

diff --git a/components/esp_system/port/arch/xtensa/esp_ipc_isr_routines.S b/components/esp_system/port/arch/xtensa/esp_ipc_isr_routines.S
@@ -23,6 +23,7 @@
 esp_ipc_isr_waiting_for_finish_cmd:
     /* waiting for the finish command */
 .check_finish_cmd:
+    memw
     l32i    a3, a2, 0
     beqz    a3, .check_finish_cmd
     ret