Make the SPI FIFO a separate object from the master driver #1579
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Dominaezzz
commented
May 23, 2024
Dominaezzz
commented
May 23, 2024
esp-hal/src/spi/master.rs
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| pub struct WholeFifo; | ||
| pub struct HalfFifo { | ||
| is_high_part: bool, | ||
| } |
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I initially had an additional LowerHalfFifo and UpperHalfFifo types, that could be downgraded into a HalfFifo, but I figured no one would really care in practice and this would be excessive generics/type state.
# Conflicts: # examples/src/bin/spi_eh1_device_loopback.rs # examples/src/bin/spi_eh1_loopback.rs
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Sorry for not getting to this yet, I will make some time this week to look at this and your proposal in the original issue. |
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Pull Request Details 📖
Description
The title says it all but basically this PR makes it so that when you create an Spi driver you get a separate FIFO object as well.
The main advantage of this being you can split the FIFO in two and prepare one half of it whilst the other is being used in an active transfer.
There's other advantages and I've outlined then in this comment.
Testing
I ran the new and existing examples on my M5Stack CoreS3.
My new example isn't quite working, I fear I may have hit a hardware bug https://www.esp32.com/viewtopic.php?f=14&t=31389 . If I can't figure it out then I'll remove the FIFO splitting feature.No hardware bug, apparently the async fifos need to also be cleared in FIFO mode, which the existing code didn't do, so I've added that and the example works.