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Test failure JIT\\HardwareIntrinsics\\General\\NotSupported\\NotSupported_r\\NotSupported_r.cmd #51612

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VincentBu opened this issue Apr 21, 2021 · 2 comments · Fixed by #52231
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arch-x86 area-CodeGen-coreclr CLR JIT compiler in src/coreclr/src/jit and related components such as SuperPMI bug in-pr There is an active PR which will close this issue when it is merged JitStress CLR JIT issues involving JIT internal stress modes os-windows
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@VincentBu
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Run: runtime-coreclr jitstress 20210419.1

Failed test:

CoreCLR windows x86 Checked jitstress2 @ Windows.10.Amd64.Open
 -JIT\\HardwareIntrinsics\\General\\NotSupported\\NotSupported_r\\NotSupported_r.cmd

Error message:

Assert failure(PID 536 [0x00000218], Thread: 5392 [0x1510]): Assertion failed 'header->gsCookieOffset != INVALID_GS_COOKIE_OFFSET' in 'System.Runtime.Intrinsics.Vector641[IntPtr][System.IntPtr]:get_AllBitsSet():System.Runtime.Intrinsics.Vector641[IntPtr]' during 'Emit GC+EH tables' (IL size 17)

 File: D:\workspace\_work\1\s\src\coreclr\jit\gcencode.cpp Line: 1602
 Image: C:\h\w\A75F094C\p\corerun.exe


Return code: 1
Raw output file: C:\h\w\A75F094C\w\BDC509D9\e\JIT\HardwareIntrinsics\Reports\JIT.HardwareIntrinsics\General\NotSupported\NotSupported_r\NotSupported_r.output.txt
Raw output:
BEGIN EXECUTION
 "C:\h\w\A75F094C\p\corerun.exe" NotSupported_r.dll 
Beginning test case Vector64BooleanZero at 4/20/2021 7:20:41 AM
Random seed: 20010415; set environment variable CORECLR_SEED to this value to repro


Ending test case at 4/20/2021 7:20:42 AM
Beginning test case Vector64BooleanAllBitsSet at 4/20/2021 7:20:42 AM
Random seed: 20010415; set environment variable CORECLR_SEED to this value to repro


Ending test case at 4/20/2021 7:20:42 AM
Beginning test case Vector64BooleanAsGeneric_Boolean at 4/20/2021 7:20:42 AM
Random seed: 20010415; set environment variable CORECLR_SEED to this value to repro


Ending test case at 4/20/2021 7:20:42 AM
Beginning test case Vector64ByteAsGeneric_Boolean at 4/20/2021 7:20:42 AM
Random seed: 20010415; set environment variable CORECLR_SEED to this value to repro


Ending test case at 4/20/2021 7:20:42 AM
Beginning test case Vector64DoubleAsGeneric_Boolean at 4/20/2021 7:20:42 AM
Random seed: 20010415; set environment variable CORECLR_SEED to this value to repro


Ending test case at 4/20/2021 7:20:42 AM
Beginning test case Vector64Int16AsGeneric_Boolean at 4/20/2021 7:20:42 AM
Random seed: 20010415; set environment variable CORECLR_SEED to this value to repro


Ending test case at 4/20/2021 7:20:42 AM
Beginning test case Vector64Int32AsGeneric_Boolean at 4/20/2021 7:20:42 AM
Random seed: 20010415; set environment variable CORECLR_SEED to this value to repro


Ending test case at 4/20/2021 7:20:42 AM
Beginning test case Vector64Int64AsGeneric_Boolean at 4/20/2021 7:20:42 AM
Random seed: 20010415; set environment variable CORECLR_SEED to this value to repro


Ending test case at 4/20/2021 7:20:42 AM
Beginning test case Vector64SByteAsGeneric_Boolean at 4/20/2021 7:20:42 AM
Random seed: 20010415; set environment variable CORECLR_SEED to this value to repro


Ending test case at 4/20/2021 7:20:42 AM
Beginning test case Vector64SingleAsGeneric_Boolean at 4/20/2021 7:20:42 AM
Random seed: 20010415; set environment variable CORECLR_SEED to this value to repro


Ending test case at 4/20/2021 7:20:42 AM
Beginning test case Vector64UInt16AsGeneric_Boolean at 4/20/2021 7:20:42 AM
Random seed: 20010415; set environment variable CORECLR_SEED to this value to repro


Ending test case at 4/20/2021 7:20:42 AM
Beginning test case Vector64UInt32AsGeneric_Boolean at 4/20/2021 7:20:42 AM
Random seed: 20010415; set environment variable CORECLR_SEED to this value to repro


Ending test case at 4/20/2021 7:20:42 AM
Beginning test case Vector64UInt64AsGeneric_Boolean at 4/20/2021 7:20:42 AM
Random seed: 20010415; set environment variable CORECLR_SEED to this value to repro


Ending test case at 4/20/2021 7:20:42 AM
Beginning test case Vector64BooleanAsGeneric_Byte at 4/20/2021 7:20:42 AM
Random seed: 20010415; set environment variable CORECLR_SEED to this value to repro


Ending test case at 4/20/2021 7:20:42 AM
Beginning test case Vector64BooleanAsGeneric_Double at 4/20/2021 7:20:42 AM
Random seed: 20010415; set environment variable CORECLR_SEED to this value to repro


Ending test case at 4/20/2021 7:20:42 AM
B

Stack trace
   at JIT_HardwareIntrinsics._General_NotSupported_NotSupported_r_NotSupported_r_._General_NotSupported_NotSupported_r_NotSupported_r_cmd()

@VincentBu VincentBu added arch-x86 os-windows JitStress CLR JIT issues involving JIT internal stress modes labels Apr 21, 2021
@dotnet-issue-labeler dotnet-issue-labeler bot added area-CodeGen-coreclr CLR JIT compiler in src/coreclr/src/jit and related components such as SuperPMI untriaged New issue has not been triaged by the area owner labels Apr 21, 2021
@JulieLeeMSFT JulieLeeMSFT removed the untriaged New issue has not been triaged by the area owner label Apr 21, 2021
@JulieLeeMSFT JulieLeeMSFT added this to the 6.0.0 milestone Apr 21, 2021
@VincentBu
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Failed again in runtime-coreclr jitstress 20210427.2

Failed test:

CoreCLR windows x86 Checked jitstress2 @ Windows.10.Amd64.Open
 -JIT\\HardwareIntrinsics\\General\\NotSupported\\NotSupported_r\\NotSupported_r.cmd

Error message:

Assert failure(PID 4412 [0x0000113c], Thread: 2696 [0x0a88]): Assertion failed 'header->gsCookieOffset != INVALID_GS_COOKIE_OFFSET' in 'System.Runtime.Intrinsics.Vector641[IntPtr][System.IntPtr]:get_AllBitsSet():System.Runtime.Intrinsics.Vector641[IntPtr]' during 'Emit GC+EH tables' (IL size 17)

 File: D:\workspace\_work\1\s\src\coreclr\jit\gcencode.cpp Line: 1602
 Image: C:\h\w\A0860938\p\corerun.exe


Return code: 1
Raw output file: C:\h\w\A0860938\w\B58A09AF\e\JIT\HardwareIntrinsics\Reports\JIT.HardwareIntrinsics\General\NotSupported\NotSupported_r\NotSupported_r.output.txt
Raw output:
BEGIN EXECUTION
 "C:\h\w\A0860938\p\corerun.exe" NotSupported_r.dll 
Beginning test case Vector64BooleanZero at 4/28/2021 7:49:16 AM
Random seed: 20010415; set environment variable CORECLR_SEED to this value to repro


Ending test case at 4/28/2021 7:49:16 AM
Beginning test case Vector64BooleanAllBitsSet at 4/28/2021 7:49:16 AM
Random seed: 20010415; set environment variable CORECLR_SEED to this value to repro


Ending test case at 4/28/2021 7:49:16 AM
Beginning test case Vector64BooleanAsGeneric_Boolean at 4/28/2021 7:49:16 AM
Random seed: 20010415; set environment variable CORECLR_SEED to this value to repro


Ending test case at 4/28/2021 7:49:16 AM
Beginning test case Vector64ByteAsGeneric_Boolean at 4/28/2021 7:49:16 AM
Random seed: 20010415; set environment variable CORECLR_SEED to this value to repro


Ending test case at 4/28/2021 7:49:16 AM
Beginning test case Vector64DoubleAsGeneric_Boolean at 4/28/2021 7:49:16 AM
Random seed: 20010415; set environment variable CORECLR_SEED to this value to repro


Ending test case at 4/28/2021 7:49:16 AM
Beginning test case Vector64Int16AsGeneric_Boolean at 4/28/2021 7:49:16 AM
Random seed: 20010415; set environment variable CORECLR_SEED to this value to repro


Ending test case at 4/28/2021 7:49:16 AM
Beginning test case Vector64Int32AsGeneric_Boolean at 4/28/2021 7:49:16 AM
Random seed: 20010415; set environment variable CORECLR_SEED to this value to repro


Ending test case at 4/28/2021 7:49:16 AM
Beginning test case Vector64Int64AsGeneric_Boolean at 4/28/2021 7:49:16 AM
Random seed: 20010415; set environment variable CORECLR_SEED to this value to repro


Ending test case at 4/28/2021 7:49:16 AM
Beginning test case Vector64SByteAsGeneric_Boolean at 4/28/2021 7:49:16 AM
Random seed: 20010415; set environment variable CORECLR_SEED to this value to repro


Ending test case at 4/28/2021 7:49:16 AM
Beginning test case Vector64SingleAsGeneric_Boolean at 4/28/2021 7:49:16 AM
Random seed: 20010415; set environment variable CORECLR_SEED to this value to repro


Ending test case at 4/28/2021 7:49:16 AM
Beginning test case Vector64UInt16AsGeneric_Boolean at 4/28/2021 7:49:16 AM
Random seed: 20010415; set environment variable CORECLR_SEED to this value to repro


Ending test case at 4/28/2021 7:49:16 AM
Beginning test case Vector64UInt32AsGeneric_Boolean at 4/28/2021 7:49:16 AM
Random seed: 20010415; set environment variable CORECLR_SEED to this value to repro


Ending test case at 4/28/2021 7:49:16 AM
Beginning test case Vector64UInt64AsGeneric_Boolean at 4/28/2021 7:49:16 AM
Random seed: 20010415; set environment variable CORECLR_SEED to this value to repro


Ending test case at 4/28/2021 7:49:16 AM
Beginning test case Vector64BooleanAsGeneric_Byte at 4/28/2021 7:49:16 AM
Random seed: 20010415; set environment variable CORECLR_SEED to this value to repro


Ending test case at 4/28/2021 7:49:16 AM
Beginning test case Vector64BooleanAsGeneric_Double at 4/28/2021 7:49:16 AM
Random seed: 20010415; set environment variable CORECLR_SEED to this value to repro


Ending test case at 4/28/2021 7:49:16 AM

Stack trace
   at JIT_HardwareIntrinsics._General_NotSupported_NotSupported_r_NotSupported_r_._General_NotSupported_NotSupported_r_NotSupported_r_cmd()

@VincentBu
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Historical failures of this test:

Queued OS Arch Pipeline
2021-04-28T07:01:46.907Z windows.10.amd64.open.rt x86 runtime-coreclr jitstress Checked-jitstress2
2021-04-27T06:35:18.722Z windows.10.amd64.open.rt x86 runtime-coreclr jitstress Checked-jitstress2
2021-04-26T06:38:35.679Z windows.10.amd64.open.rt x86 runtime-coreclr jitstress Checked-jitstress2
2021-04-26T04:54:57.4Z windows.10.amd64.open.rt x86 runtime-coreclr r2r-extra Checked-jitstress2
2021-04-25T23:53:23.475Z windows.10.amd64.open.rt x86 runtime-coreclr gcstress-extra Checked-gcstress0xc_jitstress2
2021-04-25T23:14:11.68Z windows.10.amd64.open.rt x86 runtime-coreclr gcstress-extra Checked-gcstress0xc_zapdisable_jitstress2
2021-04-25T20:10:39.19Z windows.10.amd64.open.rt x86 runtime-coreclr jitstress2-jitstressregs Checked-jitstress2_jitstressregs0x1000
2021-04-25T20:03:45.803Z windows.10.amd64.open.rt x86 runtime-coreclr jitstress2-jitstressregs Checked-jitstress2_jitstressregs0x80
2021-04-25T19:59:17.125Z windows.10.amd64.open.rt x86 runtime-coreclr jitstress2-jitstressregs Checked-jitstress2_jitstressregs0x10
More failures
Queued OS Arch Pipeline
2021-04-25T19:52:52.34Z windows.10.amd64.open.rt x86 runtime-coreclr jitstress2-jitstressregs Checked-jitstress2_jitstressregs8
2021-04-25T19:31:24.556Z windows.10.amd64.open.rt x86 runtime-coreclr jitstress2-jitstressregs Checked-jitstress2_jitstressregs3
2021-04-25T19:31:23.494Z windows.10.amd64.open.rt x86 runtime-coreclr jitstress2-jitstressregs Checked-jitstress2_jitstressregs1
2021-04-25T19:31:22.868Z windows.10.amd64.open.rt x86 runtime-coreclr jitstress2-jitstressregs Checked-jitstress2_jitstressregs4
2021-04-25T19:31:21.88Z windows.10.amd64.open.rt x86 runtime-coreclr jitstress2-jitstressregs Checked-jitstress2_jitstressregs2
2021-04-25T06:58:23.894Z windows.10.amd64.open.rt x86 runtime-coreclr jitstress Checked-jitstress2
2021-04-25T04:44:01.577Z windows.10.amd64.open.rt x86 runtime-coreclr r2r-extra Checked-jitstress2
2021-04-25T00:33:38.335Z windows.10.amd64.open.rt x86 runtime-coreclr gcstress-extra Checked-gcstress0xc_jitstress2
2021-04-24T23:42:41.312Z windows.10.amd64.open.rt x86 runtime-coreclr gcstress-extra Checked-gcstress0xc_zapdisable_jitstress2
2021-04-24T21:48:30.131Z windows.10.amd64.open.rt x86 runtime-coreclr jitstress2-jitstressregs Checked-jitstress2_jitstressregs0x1000
2021-04-24T21:47:31.671Z windows.10.amd64.open.rt x86 runtime-coreclr jitstress2-jitstressregs Checked-jitstress2_jitstressregs0x80
2021-04-24T21:46:49.705Z windows.10.amd64.open.rt x86 runtime-coreclr jitstress2-jitstressregs Checked-jitstress2_jitstressregs0x10
2021-04-24T21:36:49.199Z windows.10.amd64.open.rt x86 runtime-coreclr jitstress2-jitstressregs Checked-jitstress2_jitstressregs8
2021-04-24T20:59:08.348Z windows.10.amd64.open.rt x86 runtime-coreclr jitstress2-jitstressregs Checked-jitstress2_jitstressregs3
2021-04-24T20:59:07.683Z windows.10.amd64.open.rt x86 runtime-coreclr jitstress2-jitstressregs Checked-jitstress2_jitstressregs4
2021-04-24T20:59:06.81Z windows.10.amd64.open.rt x86 runtime-coreclr jitstress2-jitstressregs Checked-jitstress2_jitstressregs2
2021-04-24T20:59:05.495Z windows.10.amd64.open.rt x86 runtime-coreclr jitstress2-jitstressregs Checked-jitstress2_jitstressregs1
2021-04-24T06:20:02.913Z windows.10.amd64.open.rt x86 runtime-coreclr jitstress Checked-jitstress2
2021-04-23T07:06:16.365Z windows.10.amd64.open.rt x86 runtime-coreclr jitstress Checked-jitstress2
2021-04-22T06:48:15.692Z windows.10.amd64.open.rt x86 runtime-coreclr jitstress Checked-jitstress2
2021-04-21T06:46:38.143Z windows.10.amd64.open.rt x86 runtime-coreclr jitstress Checked-jitstress2
2021-04-20T06:48:32.682Z windows.10.amd64.open.rt x86 runtime-coreclr jitstress Checked-jitstress2
2021-04-01T10:16:56.526Z ubuntu.1804.armarch.open arm64 runtime-coreclr crossgen2 outerloop Checked-no_tiered_compilation
2021-04-01T10:16:56.526Z ubuntu.1804.armarch.open arm64 runtime-coreclr crossgen2 outerloop Checked-no_tiered_compilation
2021-04-01T10:16:55.583Z ubuntu.1804.armarch.open arm64 runtime-coreclr crossgen2 outerloop Checked
2021-04-01T10:16:55.583Z ubuntu.1804.armarch.open arm64 runtime-coreclr crossgen2 outerloop Checked
2021-04-01T09:47:40.3Z osx.1013.amd64.open x64 runtime-coreclr crossgen2 outerloop Checked-no_tiered_compilation
2021-04-01T09:47:40.3Z osx.1013.amd64.open x64 runtime-coreclr crossgen2 outerloop Checked-no_tiered_compilation
2021-04-01T07:58:13.727Z ubuntu.1804.armarch.open arm64 runtime-coreclr crossgen2 Checked
2021-04-01T07:58:13.727Z ubuntu.1804.armarch.open arm64 runtime-coreclr crossgen2 Checked

@echesakov echesakov added bug in-pr There is an active PR which will close this issue when it is merged labels May 4, 2021
@echesakov echesakov linked a pull request May 4, 2021 that will close this issue
echesakov added a commit to echesakov/runtime that referenced this issue May 4, 2021
echesakov added a commit that referenced this issue May 5, 2021
* Add regression test for #51612

* Allocate a dummy local when an inlinee needs GSCookie but the root method does not in src/coreclr/jit/fginline.cpp
@ghost ghost locked as resolved and limited conversation to collaborators Jun 4, 2021
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arch-x86 area-CodeGen-coreclr CLR JIT compiler in src/coreclr/src/jit and related components such as SuperPMI bug in-pr There is an active PR which will close this issue when it is merged JitStress CLR JIT issues involving JIT internal stress modes os-windows
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