STM32U5: Only try and invalidate cache if enabled.

dgarske · Jun 25, 2024 · 1967cc2 · 1967cc2
1 parent a92c1b9
commit 1967cc2
Showing 1 changed file with 8 additions and 3 deletions.
diff --git a/hal/stm32u5.c b/hal/stm32u5.c
@@ -540,15 +540,20 @@ void hal_cache_disable(void)
 
 void hal_cache_invalidate(void)
 {
-    /* Check if no ongoing operation */
+    /* only try and invalidate cache if enabled */
+    if ((ICACHE_CR & ICACHE_CR_CEN) == 0)
+        return;
+
+    /* If cache invalidate not in progress, start it */
     if ((ICACHE_SR & ICACHE_SR_BUSYF) == 0) {
-        /* Launch cache invalidation */
+        /* Start invalidate */
         ICACHE_CR |= ICACHE_CR_CACHEINV;
     }
 
+    /* If cache invalidate is active, wait for busy end flag */
     if (ICACHE_SR & ICACHE_SR_BUSYF) {
         while ((ICACHE_SR & ICACHE_SR_BSYENDF) == 0);
     }
-    /* Clear BSYENDF */
+    /* Clear busy end flag */
     ICACHE_SR |= ICACHE_SR_BSYENDF;
 }