[AArch64] Access HCR_EL2 based on CurrentEL bits

cyring · Nov 22, 2024 · 6436a48 · 6436a48
1 parent c574ab1
commit 6436a48
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Showing 2 changed files with 9 additions and 9 deletions.
diff --git a/Makefile b/Makefile
@@ -4,7 +4,7 @@
 
 COREFREQ_MAJOR = 1
 COREFREQ_MINOR = 98
-COREFREQ_REV = 7
+COREFREQ_REV = 8
 HW = $(shell uname -m)
 CC ?= cc
 WARNING = -Wall -Wfatal-errors

diff --git a/aarch64/corefreqk.c b/aarch64/corefreqk.c
@@ -2449,14 +2449,6 @@ static void SystemRegisters(CORE_RO *Core)
 
 	isar2.value = SysRegRead(ID_AA64ISAR2_EL1);
 
-    if (Experimental) {
-	__asm__ __volatile__(
-		"mrs	%[hcr]	,	hcr_el2"
-		: [hcr] 	"=r" (Core->SystemRegister.HCR)
-		:
-		: "cc", "memory"
-	);
-    }
 	__asm__ __volatile__(
 		"mrs	%[sctlr],	sctlr_el1"	"\n\t"
 		"mrs	%[mmfr1],	id_aa64mmfr1_el1""\n\t"
@@ -2604,6 +2596,14 @@ static void SystemRegisters(CORE_RO *Core)
 	if (PUBLIC(RO(Proc))->Features.SME) {
 		Core->SystemRegister.SVCR = SysRegRead(MRS_SVCR);
 	}
+	if (BITEXTRZ(Core->SystemRegister.FLAGS, FLAG_EL, 2) >= 2) {
+		__asm__ __volatile__(
+			"mrs	%[hcr]	,	hcr_el2"
+			: [hcr] 	"=r" (Core->SystemRegister.HCR)
+			:
+			: "cc", "memory"
+		);
+	}
 	BITSET_CC(LOCKLESS, PUBLIC(RO(Proc))->CR_Mask, Core->Bind);
 }