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Create pc-reg.v
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cslotterback committed Jul 22, 2013
1 parent 6e145d9 commit 6caedcc
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41 changes: 41 additions & 0 deletions pc-reg.v
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module PC_REG
(
clk,
reset,
PC_in,
PC_out
);

parameter pc_delay = 1;

output [31:0] PC_out;
reg [31:0] PC_out;
reg [31:0] next_PC;

input [31:0] PC_in;
input clk;
input reset;

always@(posedge clk or posedge reset)
begin
if (~reset)
PC_out = PC_in;
else
PC_out = 32'h00400000;
end

endmodule // PC_REG














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