Skip to content

Commit

Permalink
Added partial support for riscv opcodes package
Browse files Browse the repository at this point in the history
  • Loading branch information
@puneet
puneet committed Jan 9, 2024
1 parent fcafde9 commit 1aa3cd3
Show file tree
Hide file tree
Showing 6 changed files with 31 additions and 31 deletions.
14 changes: 14 additions & 0 deletions euvm/README.md
View file
Original file line number Diff line number Diff line change
Expand Up @@ -10,6 +10,8 @@ The RISCV-DV eUVM port is a line-by-line translation of the RISCV-DV SystemVeril

If you want to build/use the eUVM port, you need an eUVM installation. Please follow the instructions on https://github.com/coverify/euvm/releases to install and setup eUVM.

Please use euvm 1.0-beta36 or later release for compiling and running RISCV-DV.

## Building eUVM port of RISCV-DV

A makefile to build and run the eUVM port is available in the euvm/build folder. To build the code, use the following commands (assuming bash shell):
Expand Down Expand Up @@ -41,3 +43,15 @@ You can change the number of instructions to be generated by passsing INSTRCOUNT
```bash
make run INSTRCOUNT=1000000
```

To run arithmatic_only_test for 10 million instructions:

```
make run_riscv_arithmetic_only_test INSTRCOUNT=10000000
```

To run arithmatic_only_test for 10 million instructions using 32 threads:

```
make run_riscv_arithmetic_only_test INSTRCOUNT=10000000 THREADS=32
```
10 changes: 5 additions & 5 deletions euvm/build/makefile
View file
Original file line number Diff line number Diff line change
Expand Up @@ -127,17 +127,17 @@ $(DBGPICOBJDIR)/%.o: ../%.d
libriscv-dv-ldc-shared.so: $(addprefix $(PICOBJDIR)/,$(GEN_OBJS)) \
$(addprefix $(PICOBJDIR)/,$(ISA_OBJS)) \
$(addprefix $(PICOBJDIR)/,$(TEST_OBJS))
CC=$(CC) $(LDC2) -shared $(DFLAGS) -relocation-model=pic -of$@ -I.. $^ -L-luvm-ldc-shared -L-lesdl-ldc-shared -L-lphobos2-ldc-shared -L-ldruntime-ldc-shared -L-lz3
CC=$(CC) $(LDC2) -shared $(DFLAGS) -relocation-model=pic -of$@ -I.. $^ -L-luvm-ldc-shared -L-lesdl-ldc-shared -L-lphobos2-ldc-shared -L-ldruntime-ldc-shared -L-lz3 -L-lboolector

libriscv-dv-ldc-debug-shared.so: $(addprefix $(DBGPICOBJDIR)/,$(GEN_OBJS)) \
$(addprefix $(DBGPICOBJDIR)/,$(ISA_OBJS)) \
$(addprefix $(DBGPICOBJDIR)/,$(TEST_OBJS))
CC=$(CC) $(LDC2) -shared $(DBGDFLAGS) -relocation-model=pic -of$@ -I.. $^ -L-luvm-ldc-debug-shared -L-lesdl-ldc-debug-shared -L-lphobos2-ldc-debug-shared -L-ldruntime-ldc-debug-shared -L-lz3
CC=$(CC) $(LDC2) -shared $(DBGDFLAGS) -relocation-model=pic -of$@ -I.. $^ -L-luvm-ldc-debug-shared -L-lesdl-ldc-debug-shared -L-lphobos2-ldc-debug-shared -L-ldruntime-ldc-debug-shared -L-lz3 -L-lboolector

libriscv-dv-ldc-shared-alt.so: $(addprefix ../,$(GEN_FILES)) \
$(addprefix ../,$(ISA_FILES)) \
$(addprefix $(PICOBJDIR)/,$(TEST_OBJS))
CC=$(CC) $(LDC2) -shared $(DFLAGS) -relocation-model=pic -of$@ -I.. $^ -L-luvm-ldc-shared -L-lesdl-ldc-shared -L-lphobos2-ldc-shared -L-ldruntime-ldc-shared -L-lz3
CC=$(CC) $(LDC2) -shared $(DFLAGS) -relocation-model=pic -of$@ -I.. $^ -L-luvm-ldc-shared -L-lesdl-ldc-shared -L-lphobos2-ldc-shared -L-ldruntime-ldc-shared -L-lz3 -L-lboolector

libriscv-dv-ldc.a: $(addprefix $(PICOBJDIR)/,$(GEN_OBJS)) \
$(addprefix $(PICOBJDIR)/,$(ISA_OBJS)) \
Expand All @@ -150,10 +150,10 @@ TAGS: $(addprefix ../,$(GEN_FILES)) \
dscanner --etags $^ > $@

riscv_instr_gen: ../riscv/test/riscv_instr_gen.d libriscv-dv-ldc-shared.so
$(LDC2) -link-defaultlib-shared $(DFLAGS) -of$@ -I.. -L--no-as-needed -L-R./ -L-L./ $< -L-lriscv-dv-ldc-shared -L-luvm-ldc-shared -L-lesdl-ldc-shared -L-lz3 -L-ldl # -defaultlib=phobos2-ldc-lto,druntime-ldc-lto
$(LDC2) -link-defaultlib-shared $(DFLAGS) -of$@ -I.. -L--no-as-needed -L-R./ -L-L./ $< -L-lriscv-dv-ldc-shared -L-luvm-ldc-shared -L-lesdl-ldc-shared -L-lz3 -L-ldl -L-lboolector # -defaultlib=phobos2-ldc-lto,druntime-ldc-lto

riscv_instr_gen_debug: ../riscv/test/riscv_instr_gen.d libriscv-dv-ldc-debug-shared.so
$(LDC2) -link-defaultlib-shared $(DBGDFLAGS) -of$@ -I.. -L--no-as-needed -L-R./ -L-L./ $< -L-lriscv-dv-ldc-debug-shared -L-luvm-ldc-debug-shared -L-lesdl-ldc-debug-shared -L-lphobos2-ldc-debug-shared -L-ldruntime-ldc-debug-shared -L-lz3 -L-ldl
$(LDC2) -link-defaultlib-shared $(DBGDFLAGS) -of$@ -I.. -L--no-as-needed -L-R./ -L-L./ $< -L-lriscv-dv-ldc-debug-shared -L-luvm-ldc-debug-shared -L-lesdl-ldc-debug-shared -L-lphobos2-ldc-debug-shared -L-ldruntime-ldc-debug-shared -L-lz3 -L-ldl -L-lboolector

run: riscv_instr_gen
./riscv_instr_gen $(GCOPTS) +UVM_VERBOSITY=$(VERBOSITY) +random_seed=$(RANDSEED) +par_num_threads=$(THREADS) +thread_index=$(CPU) +UVM_TESTNAME=riscv.test.riscv_instr_base_test.riscv_instr_base_test +num_of_tests=1 +start_idx=0 +asm_file_name=out_$(DATE)/asm_test/riscv_rand_instr_test +instr_cnt=$(INSTRCOUNT) +num_of_sub_program=5 \
Expand Down
4 changes: 4 additions & 0 deletions euvm/riscv/gen/riscv_asm_program_gen.d
View file
Original file line number Diff line number Diff line change
Expand Up @@ -1847,6 +1847,10 @@ class riscv_asm_program_gen : uvm_object
}
instr_stream.length = stream_length;
foreach (f; forks) f.join();
// import esdl.rand.meta: printSolverStats;
// import std.stdio;
// writeln("printing solver stats");
// printSolverStats();
assert (stream_idx == instr_stream.length);
instr_stream.shuffle();
}
Expand Down
23 changes: 2 additions & 21 deletions euvm/riscv/gen/riscv_defines.d
View file
Original file line number Diff line number Diff line change
Expand Up @@ -138,7 +138,7 @@ string riscv_va_instr_mixin_tmpl(BASE_TYPE)(riscv_instr_name_t instr_name,

void print_class_info(T)(T inst) {
static if (is (T B == super)) {
pragma(msg, B.stringof);
// pragma(msg, B.stringof);
import std.stdio: writeln;
writeln("Randomized ", B[0].stringof);
}
Expand Down Expand Up @@ -179,7 +179,7 @@ mixin template RISCV_INSTR_MIXIN(riscv_instr_name_t instr_n,
static assert (RISCV_PARAMS._name == instr_n);
enum HAS_RS1 = hasReg(riscv_opcodes_args_t.rs1, RISCV_PARAMS._args);

pragma(msg, instr_n.stringof ~ " " ~ HAS_RS1.stringof);
// pragma(msg, instr_n.stringof ~ " " ~ HAS_RS1.stringof);
mixin uvm_object_utils;
this(string name="") {
super(name);
Expand All @@ -196,15 +196,6 @@ mixin template RISCV_INSTR_MIXIN(riscv_instr_name_t instr_n,
// print_class_info(this);
// }

static if (HAS_RS1) {
pragma(msg, "Constraint Gets Defined");
// constraint!q{

// }
}
else {
pragma(msg, "Constraint Does not Get Defined");
}

static if (instr_n == riscv_instr_name_t.SLLIW ||
instr_n == riscv_instr_name_t.SRLIW ||
Expand Down Expand Up @@ -267,7 +258,6 @@ mixin template RISCV_C_INSTR_MIXIN(riscv_instr_name_t instr_n,
static assert (RISCV_PARAMS._name == instr_n);
enum HAS_RS1 = hasReg(riscv_opcodes_args_t.rs1, RISCV_PARAMS._args);

pragma(msg, instr_n.stringof ~ " " ~ HAS_RS1.stringof);
mixin uvm_object_utils;
this(string name="") {
super(name);
Expand All @@ -284,15 +274,6 @@ mixin template RISCV_C_INSTR_MIXIN(riscv_instr_name_t instr_n,
// print_class_info(this);
// }

static if (HAS_RS1) {
pragma(msg, "Constraint Gets Defined");
// constraint!q{

// }
}
else {
pragma(msg, "Constraint Does not Get Defined");
}

static if (imm_tp == imm_t.NZIMM || imm_tp == imm_t.NZUIMM) {
constraint! q{
Expand Down
10 changes: 5 additions & 5 deletions euvm/riscv/gen/riscv_instr_registry.d
View file
Original file line number Diff line number Diff line change
Expand Up @@ -33,7 +33,7 @@ import std.algorithm.sorting: sort;
import std.traits: EnumMembers;

import esdl.base.rand: urandom;
import esdl.experimental.allocator.tallocator: Tallocator;
import esdl.experimental.allocator.tcallocator: TCallocator;
import std.container.array: Array;
import esdl.data.vector: Vector;

Expand All @@ -57,7 +57,7 @@ class riscv_instr_registry: uvm_object
riscv_instr[riscv_instr_name_t] instr_template;

riscv_instr_gen_config cfg;
static Tallocator!(1024*1024) tallocator;
static TCallocator!(1024*1024) tcallocator;

this (string name="") {
super(name);
Expand Down Expand Up @@ -273,7 +273,7 @@ class riscv_instr_registry: uvm_object
name = inter_set[idx];
}
// Shallow copy for all relevant fields, avoid using create() to improve performance
auto instr = instr_template[name].dup(tallocator);
auto instr = instr_template[name].dup(tcallocator);
// auto instr = instr_template[name].dup();
instr.m_cfg = cfg;
return instr;
Expand Down Expand Up @@ -302,7 +302,7 @@ class riscv_instr_registry: uvm_object
ulong idx = urandom( 0, load_store_instr.length);
riscv_instr_name_t name = load_store_instr[idx];
// Shallow copy for all relevant fields, avoid using create() to improve performance
auto instr = instr_template[name].dup(tallocator);
auto instr = instr_template[name].dup(tcallocator);
// auto instr = instr_template[name].dup();
instr.m_cfg = cfg;
return instr;
Expand All @@ -313,7 +313,7 @@ class riscv_instr_registry: uvm_object
uvm_fatal("riscv_instr", format("Cannot get instr %0s", name));
}
// Shallow copy for all relevant fields, avoid using create() to improve performance
auto instr = instr_template[name].dup(tallocator);
auto instr = instr_template[name].dup(tcallocator);
// auto instr = instr_template[name].dup();
instr.m_cfg = cfg;
return instr;
Expand Down
1 change: 1 addition & 0 deletions euvm/riscv/test/riscv_instr_gen.d
View file
Original file line number Diff line number Diff line change
Expand Up @@ -16,6 +16,7 @@

import uvm;
import esdl;
// import esdl.rand.meta: printStats;

int main(string[] args) {
import std.stdio: writeln;
Expand Down

0 comments on commit 1aa3cd3

Please sign in to comment.