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✨ Add function to detect if non-operational status is due to wire kink #587

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20 changes: 9 additions & 11 deletions include/fiction/algorithms/simulation/sidb/is_operational.hpp
Original file line number Diff line number Diff line change
Expand Up @@ -103,11 +103,11 @@ enum class non_operationality_reason : uint8_t
*/
KINKS,
/**
* The layout is non-operational due to a logic mismatch.
* The layout is non-operational because of logic mismatch.
*/
LOGIC_MISMATCH,
/**
* No reason for non-operational was found.
* No reason for non-operationality could be determined.
*/
NONE,
};
Expand Down Expand Up @@ -182,7 +182,7 @@ class is_operational_impl
assert((truth_table.size() == output_bdl_pairs.size()) &&
"Number of truth tables and output BDL pairs does not match");

bool at_least_one_kink_induced_non_operational = false;
bool at_least_one_kink_induced_layout_to_non_operational = false;
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// number of different input combinations
for (auto i = 0u; i < truth_table.front().num_bits(); ++i, ++bii)
Expand Down Expand Up @@ -217,13 +217,13 @@ class is_operational_impl
if (op_status == operational_status::NON_OPERATIONAL &&
non_op_reason == non_operationality_reason::KINKS)
{
at_least_one_kink_induced_non_operational = true;
at_least_one_kink_induced_layout_to_non_operational = true;
continue;
}
}
}

if (at_least_one_kink_induced_non_operational)
if (at_least_one_kink_induced_layout_to_non_operational)
{
return {operational_status::NON_OPERATIONAL, non_operationality_reason::KINKS};
}
Expand Down Expand Up @@ -705,13 +705,12 @@ template <typename Lyt, typename TT>

return input_patterns;
}

/**
* This function determines all input combinations for which kinks induce the SiDB layout to become non-operational.
* This means that the layout is operational if kinks would be accepted.
*
* @note "kink induced non-operational" refers to the operational status being exclusively caused to be
* `NON_OPERATIONAL` by kinks.
* @note "Kink induced non-operational" refers to the non-operational status being exclusively caused by kinks with an
* otherwise correct logic match.
*
* @tparam Lyt SiDB cell-level layout type.
* @tparam TT Type of the truth table.
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Expand Down Expand Up @@ -757,13 +756,12 @@ kink_induced_non_operational_input_patterns(const Lyt& lyt, const std::vector<TT

return kink_induced_non_op_patterns;
}

/**
* This function determines if the layout is only considered as non-operational because of kinks. This means that
* the layout would be considered as operational, if kinks were accepted.
*
* @note "Kink induced non-operational" refers to the operational status being exclusively caused to be
* `NON_OPERATIONAL` due to kinks.
* @note "Kink induced non-operational" refers to the non-operational status being exclusively caused by kinks with an
* otherwise correct logic match.
*
* @tparam Lyt SiDB cell-level layout type.
* @tparam TT Type of the truth table.
Expand Down
42 changes: 14 additions & 28 deletions test/algorithms/simulation/sidb/is_operational.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -27,23 +27,21 @@ TEST_CASE("SiQAD OR gate", "[is-operational]")

const sidb_100_cell_clk_lyt_siqad lat{layout_or_gate};

auto op_params = is_operational_params{sidb_simulation_parameters{2, -0.28}, sidb_simulation_engine::QUICKEXACT,
bdl_input_iterator_params{
detect_bdl_wires_params{1.5},
bdl_input_iterator_params::input_bdl_configuration::PERTURBER_ABSENCE_ENCODED},
operational_condition::REJECT_KINKS};

CHECK(is_operational(
lat, std::vector<tt>{create_or_tt()},
is_operational_params{sidb_simulation_parameters{2, -0.28}, sidb_simulation_engine::QUICKEXACT,
bdl_input_iterator_params{
detect_bdl_wires_params{1.5},
bdl_input_iterator_params::input_bdl_configuration::PERTURBER_ABSENCE_ENCODED},
operational_condition::REJECT_KINKS})
op_params)
.first == operational_status::NON_OPERATIONAL);

// determine if kinks induce layout to become non-operational.
const auto kink_induced_non_operational = is_kink_induced_non_operational(
lat, std::vector<tt>{create_or_tt()},
is_operational_params{
sidb_simulation_parameters{2, -0.28}, sidb_simulation_engine::QUICKEXACT,
bdl_input_iterator_params{detect_bdl_wires_params{1.5},
bdl_input_iterator_params::input_bdl_configuration::PERTURBER_ABSENCE_ENCODED},
operational_condition::REJECT_KINKS});
op_params);
CHECK(kink_induced_non_operational);

const auto input_wires = detect_bdl_wires(lat, detect_bdl_wires_params{1.5});
Expand All @@ -52,32 +50,20 @@ TEST_CASE("SiQAD OR gate", "[is-operational]")
// determine if kinks induce layout to become non-operational.
const auto kink_induced_non_operational_predefined_wires = is_kink_induced_non_operational(
lat, std::vector<tt>{create_or_tt()},
is_operational_params{
sidb_simulation_parameters{2, -0.28}, sidb_simulation_engine::QUICKEXACT,
bdl_input_iterator_params{detect_bdl_wires_params{1.5},
bdl_input_iterator_params::input_bdl_configuration::PERTURBER_ABSENCE_ENCODED},
operational_condition::REJECT_KINKS},
op_params,
std::optional{input_wires}, std::optional{output_wires});
CHECK(kink_induced_non_operational_predefined_wires);

// determine input patterns for which kinks induce layout to become non-operational.
const auto kink_induced_non_operational_input_pattern = kink_induced_non_operational_input_patterns(
lat, std::vector<tt>{create_or_tt()},
is_operational_params{
sidb_simulation_parameters{2, -0.28}, sidb_simulation_engine::QUICKEXACT,
bdl_input_iterator_params{detect_bdl_wires_params{1.5},
bdl_input_iterator_params::input_bdl_configuration::PERTURBER_ABSENCE_ENCODED},
operational_condition::REJECT_KINKS});
op_params);

CHECK(kink_induced_non_operational_input_pattern.size() == 1);

op_params.op_condition = operational_condition::TOLERATE_KINKS;
CHECK(is_operational(
lat, std::vector<tt>{create_or_tt()},
is_operational_params{sidb_simulation_parameters{2, -0.28}, sidb_simulation_engine::QUICKEXACT,
bdl_input_iterator_params{
detect_bdl_wires_params{1.5},
bdl_input_iterator_params::input_bdl_configuration::PERTURBER_ABSENCE_ENCODED},
operational_condition::TOLERATE_KINKS})
lat, std::vector<tt>{create_or_tt()},op_params)
.first == operational_status::OPERATIONAL);
}

Expand Down Expand Up @@ -255,7 +241,7 @@ TEMPLATE_TEST_CASE("AND gate on the H-Si(111)-1x1 surface", "[is-operational]",
}

TEST_CASE(
"AND gate with bestagon structure and kink state on right input wire for input 01 and left input wire for input 10",
"AND gate with Bestagon structure and kink state on right input wire for input 01 and left input wire for input 10",
"[is-operational]")
{
const auto lyt = blueprints::and_gate_with_kink_states<sidb_cell_clk_lyt_siqad>();
Expand All @@ -274,7 +260,7 @@ TEST_CASE(
operational_condition::REJECT_KINKS})
.first == operational_status::NON_OPERATIONAL);
}
SECTION("check if is_kink_induced_non_operational return true")
SECTION("check if is_kink_induced_non_operational returns true")
{
// check if the function works correctly even if the parameter is wrong (kinks are accepted).
CHECK(is_kink_induced_non_operational(
Expand Down
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