x64: Implement SIMD fma

[afonso360]

👋 Hey,

Following the discussion in #4462, this PR adds a VEX encoder and lowering for SIMD fma with FMA extension instructions.

The VEX Encoder has an API similar to the EVEX encoder, however instead of writing the instruction as the caller is calling the fields, we store them all and later write the full instruction in encode.

This is because the VEX instruction format is much less predictable than EVEX and I couldn't find a way to cleanly write the bit fields, since at any time we can switch from 2 to 3 byte prefixes.

@abrown mentioned in #4462, there are potentially some improvements that we may want to do.

With that in place, we would probably need think through how to emit AVX instructions; e.g., something like Avx512Opcode but perhaps we want to be able to decide on the VEX/EVEX encoding at a later time (?)

Right now this implements AvxOpcode and always lowers it in VEX encoding. However I like the idea of choosing the encoding based on what is available and most efficient. Suggestions on how we would implement this would be appreciated!

Fixes #4462

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[abrown]

LGTM!

[cfallin]

New 4-register form looks good except for the pretty-print, where I think a few of the args are unintentionally reordered.